[flashrom-gerrit] [M] Change in flashrom[master]: ichspi: Clear Fast SPI HSFC register before HW seq operation

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/69751 )

Change subject: ichspi: Clear Fast SPI HSFC register before HW seq operation
......................................................................

ichspi: Clear Fast SPI HSFC register before HW seq operation

This patch fixes a regression introduced with
commit 7ed1337309d3fe74f5af09520970f0f1d417399a (ichspi: Factor out
common hwseq_xfer logic into helpers).

The reason for the regression is ignoring the fact that the Fast SPI
controller MMIO register HSFC (0x06) might not hold the default value
aka `0` before initiating the HW sequencing operation.

Having a `1b` value in the HSFC.FDBC (bits 24-29) field would represent
a byte that needs to be transfered.

While debugging the regression, we have observed that the default value
(3) in the HSFC. FDBC offset during `--wp-disable` operation represents
higher numbers of bytes than the actual and eventually results in the
error.

BUG=b:258280679
TEST=Able to build flashrom and perform below operations on Google, Rex
and Google, Kano/Taeko.

Without this patch:

HSFC register value inside ich_start_hwseq_xfer() before initiating
the HW seq operations: 0x300
HSFC register value inside ich_start_hwseq_xfer() during the HW seq
operations (--wp-disable): 0x311

With this patch:

HSFC register value inside ich_start_hwseq_xfer() before initiating
the HW seq operations: 0x0
HSFC register value inside ich_start_hwseq_xfer() during the HW seq
operations (--wp-disable): 0x11

Additionally, verified other HW sequencing operations (like read, write,
erase, read status, write status, read ID) working fine without any
error.

Signed-off-by: Subrata Banik 
Change-Id: I8cffcbc9046b7aa4086ff3049511df034088eb93
---
M ichspi.c
1 file changed, 50 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/51/69751/1

diff --git a/ichspi.c b/ichspi.c
index d2600ff..7415edc 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -1357,6 +1357,8 @@

/* make sure FDONE, FCERR, AEL are cleared by writing 1 to them */
    REGWRITE16(ICH9_REG_HSFS, REGREAD16(ICH9_REG_HSFS));
+	/* make sure HSFC register is cleared before initiate any operation */
+	REGWRITE16(ICH9_REG_HSFC, 0);

/* Set up transaction parameters. */
    hsfc = REGREAD16(ICH9_REG_HSFC);