Thomas Heijligen has submitted this change. ( https://review.coreboot.org/c/flashrom/+/64253 )
Change subject: ichspi: Add Intel Alder Lake-S support ......................................................................
ichspi: Add Intel Alder Lake-S support
Add ADL PCH-S device IDs to enable flashrom on Alder Lake-S platforms.
TEST=Dump BIOS on MSI Z690 PRO DDR4 WIFI
Change-Id: Ib2a8c057994874a41ed400b176f156048dae43c0 Signed-off-by: Michał Kopeć michal.kopec@3mdeb.com Reviewed-on: https://review.coreboot.org/c/flashrom/+/64253 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Thomas Heijligen src@posteo.de --- M chipset_enable.c M ich_descriptors.c 2 files changed, 15 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Thomas Heijligen: Looks good to me, approved
diff --git a/chipset_enable.c b/chipset_enable.c index a0bffa0..7516f1d 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -2168,6 +2168,15 @@ {0x8086, 0x438b, B_S, DEP, "Intel", "HM570", enable_flash_pch500}, {0x8086, 0x54a4, B_S, DEP, "Intel", "Alder Lake-N", enable_flash_pch600}, {0x8086, 0x51a4, B_S, DEP, "Intel", "Alder Lake-P", enable_flash_pch600}, + {0x8086, 0x7a87, B_S, NT, "Intel", "H610", enable_flash_pch600}, + {0x8086, 0x7a86, B_S, NT, "Intel", "B660", enable_flash_pch600}, + {0x8086, 0x7a85, B_S, NT, "Intel", "H670", enable_flash_pch600}, + {0x8086, 0x7a83, B_S, NT, "Intel", "Q670", enable_flash_pch600}, + {0x8086, 0x7a84, B_S, DEP, "Intel", "Z690", enable_flash_pch600}, + {0x8086, 0x7a88, B_S, NT, "Intel", "W680", enable_flash_pch600}, + {0x8086, 0x7a8a, B_S, NT, "Intel", "W685", enable_flash_pch600}, + {0x8086, 0x7a8d, B_S, NT, "Intel", "WM690", enable_flash_pch600}, + {0x8086, 0x7a8c, B_S, NT, "Intel", "HM670", enable_flash_pch600}, {0x8086, 0x7e23, B_S, DEP, "Intel", "Meteor Lake-P/M", enable_flash_mtl}, #endif {0}, diff --git a/ich_descriptors.c b/ich_descriptors.c index 797642e..8709603 100644 --- a/ich_descriptors.c +++ b/ich_descriptors.c @@ -1048,8 +1048,12 @@ } else { if (content->ICCRIBA == 0x34) return CHIPSET_300_SERIES_CANNON_POINT; - if (content->CSSL == 0x11) - return CHIPSET_500_SERIES_TIGER_POINT; + if (content->CSSL == 0x11) { + if (content->CSSO == 0x68) + return CHIPSET_500_SERIES_TIGER_POINT; + else if (content->CSSO == 0x5c) + return CHIPSET_600_SERIES_ALDER_POINT; + } if (content->CSSL == 0x14) return CHIPSET_600_SERIES_ALDER_POINT; if (content->CSSL == 0x03) {