Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/48662 )
Change subject: realtek_mst_i2c_spi.c: Add ISP mode check ......................................................................
Patch Set 3: Code-Review+2
(2 comments)
https://review.coreboot.org/c/flashrom/+/48662/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/flashrom/+/48662/3//COMMIT_MSG@13 PS3, Line 13: TEST=build and run mst commands
I believe I did try this for every change I have made. […]
If it works then that's good enough for me, Ack.
https://review.coreboot.org/c/flashrom/+/48662/3/realtek_mst_i2c_spi.c File realtek_mst_i2c_spi.c:
https://review.coreboot.org/c/flashrom/+/48662/3/realtek_mst_i2c_spi.c@124 PS3, Line 124: MCU_ISP_MODE_MASK, MCU_ISP_MODE_MASK
I believe we are waiting for the bit 7 to reach 1 so we do expect to have '(val & MCU_ISP_MODE_MASK) […]
Ack.