Attention is currently required from: Nicholas Chin.
ZhiYuanNJ has posted comments on this change by ZhiYuanNJ. ( https://review.coreboot.org/c/flashrom/+/82776?usp=email )
Change subject: ch347_spi: Add spi clock frequency selection ......................................................................
Patch Set 6:
(2 comments)
File ch347_spi.c:
https://review.coreboot.org/c/flashrom/+/82776/comment/986e4c31_e185e639?usp... : PS5, Line 290: int index = 0;
I just noticed this when testing your patch. […]
When the clock is set error, index=1, set default 30MHz clock.
https://review.coreboot.org/c/flashrom/+/82776/comment/7e87825b_f26dae2e?usp... : PS5, Line 370: msg_pinfo("CH347 SPI clock set to %s.\n", spispeeds[index].name);
If the spispeed parameter is invalid, `index` is 8 here, so this prints out `CH347 SPI clock set to […]
Done