Attention is currently required from: Nico Huber, Thomas Heijligen, Angel Pons, Anastasia Klimchuk. Sergii Dmytruk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59072 )
Change subject: dummyflasher: add SR2 and SR3 emulation harness ......................................................................
Patch Set 34:
(3 comments)
File dummyflasher.c:
https://review.coreboot.org/c/flashrom/+/59072/comment/23f05b79_8161406e PS16, Line 347: other chips might differ
Just checking: you are saying "updated comment" but the comment is removed, is it as expected?
It was also moved to the top where `bool emu_wrsr_ext;` is declared.
File dummyflasher.c:
https://review.coreboot.org/c/flashrom/+/59072/comment/f37228af_6bf50d47 PS34, Line 169: assert
Maybe separate functions for each status? […]
I would split it into three functions, but it would complicate CB:59074 where WP starts influencing RO masks for all status registers. So I've done it differently: renamed the function to accept any register and made it print a warning on unhandled input and then return 0.
File flashrom.8.tmpl:
https://review.coreboot.org/c/flashrom/+/59072/comment/52f9a378_dd8b5197 PS34, Line 817: is a hexadecimal value of up to 24 bits. For example, 0x332211 assigns 0x11 to : SR1, 0x22 to SR2 and 0x33 to SR3. Shorter value is padded to 24 bits with : zeroes on the left. See datasheet for chosen chip for details about the : registers content.
Based on this , it would be great to have 3 test scenarios listed in commit message, 3 times `flashr […]
Done