Attention is currently required from: Simon Buhrow, Nico Huber, Thomas Heijligen.
Aarya has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/67354 )
Change subject: spi.c: Add erasefn and opcodes for AT45 and S25F
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Patch Set 2:
(1 comment)
File spi.c:
https://review.coreboot.org/c/flashrom/+/67354/comment/321af962_5901dffb
PS2, Line 50: &spi_erase_at45cs_sector, 0x50},
That is quite annoying. The logical thing to do would be to return both […]
Maybe we can make a separate probe_opcode function for this chip?
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