Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/84090?usp=email )
Change subject: flashchips: add GD25F256F ......................................................................
flashchips: add GD25F256F
GD25F256F: 3V 256Mbit, high performance
Tested on ch347 with erase, write, read, and protection
Change-Id: Ibbbbb8a55adbcbc2ee1785782c4eb3771d50c167 Signed-off-by: Victor Lim vlim@gigadevice.com Reviewed-on: https://review.coreboot.org/c/flashrom/+/84090 Reviewed-by: Anastasia Klimchuk aklm@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M flashchips.c M include/flashchips.h 2 files changed, 54 insertions(+), 0 deletions(-)
Approvals: Anastasia Klimchuk: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/flashchips.c b/flashchips.c index e56851c..b239b5e 100644 --- a/flashchips.c +++ b/flashchips.c @@ -8190,6 +8190,59 @@
{ .vendor = "GigaDevice", + .name = "GD25F256F", + .bustype = BUS_SPI, + .manufacture_id = GIGADEVICE_ID, + .model_id = GIGADEVICE_GD25F256F, + .total_size = 32768, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI | FEATURE_WRSR2 | FEATURE_WRSR3 | FEATURE_4BA, + .tested = TEST_OK_PREWB, + .probe = PROBE_SPI_RDID, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = SPI_BLOCK_ERASE_21, + }, { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = SPI_BLOCK_ERASE_20, + }, { + .eraseblocks = { {32 * 1024, 1024} }, + .block_erase = SPI_BLOCK_ERASE_5C, + }, { + .eraseblocks = { {32 * 1024, 1024} }, + .block_erase = SPI_BLOCK_ERASE_52, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = SPI_BLOCK_ERASE_DC, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = SPI_BLOCK_ERASE_D8, + }, { + .eraseblocks = { {32 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_60, + }, { + .eraseblocks = { {32 * 1024 * 1024, 1} }, + .block_erase = SPI_BLOCK_ERASE_C7, + } + }, + .printlock = SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD, + .unlock = SPI_DISABLE_BLOCKPROTECT_BP4_SRWD, + .write = SPI_CHIP_WRITE256, + .read = SPI_CHIP_READ, + .voltage = {2700, 3600}, + .reg_bits = + { + .bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}}, + .tb = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like TB */ + }, + .decode_range = DECODE_RANGE_SPI25, + }, + + { + .vendor = "GigaDevice", .name = "GD25WQ80E", .bustype = BUS_SPI, .manufacture_id = GIGADEVICE_ID, diff --git a/include/flashchips.h b/include/flashchips.h index 53cc9ec..534304a 100644 --- a/include/flashchips.h +++ b/include/flashchips.h @@ -402,6 +402,7 @@ #define GIGADEVICE_GD25VQ80C 0x4214 #define GIGADEVICE_GD25VQ16C 0x4215 #define GIGADEVICE_GD25F64F 0x4317 +#define GIGADEVICE_GD25F256F 0x4319 #define GIGADEVICE_GD25LQ40 0x6013 #define GIGADEVICE_GD25LQ80 0x6014 #define GIGADEVICE_GD25LQ16 0x6015