Samir Ibradžić has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/39822 )
Change subject: flashchips: port S25FS(128S) chip from chromiumos
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Patch Set 2:
(2 comments)
Patch Set 1:
(2 comments)
Most of the functions are from https://chromium.googlesource.com/chromiumos/third_party/flashrom/+/master/s..., which doesn't exist upstream.
https://review.coreboot.org/c/flashrom/+/39822/1//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/flashrom/+/39822/1//COMMIT_MSG@14
PS1, Line 14: For example, WIP status bit will remain being set to 1 if erase or
Please add exactly one blank line between paragraphs.
Done
https://review.coreboot.org/c/flashrom/+/39822/1//COMMIT_MSG@75
PS1, Line 75:
very likely the CrOS flashrom fork
Done
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Gerrit-Project: flashrom
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Gerrit-Change-Number: 39822
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