Attention is currently required from: Patrick Georgi, Rizwan Qureshi, Stefan Reinauer, Sridhar Siricilla, Angel Pons, Alex Levin, YH Lin, Martin Roth, Subrata Banik, Caveh Jalali, Tim Wawrzynczak, Nick Vaccaro, Boris Mittelberg. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/61854 )
Change subject: ichspi.c: Check SPI Cycle In-Progress prior start HW Seq ......................................................................
Patch Set 9:
(3 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/61854/comment/a5caa685_8e004829 PS7, Line 17: Without this synchronisation being implemented, flashrom is running : into below error: : : Erasing and writing flash chip... Timeout error between offset : 0x0061c000 and 0x0061c03f (= 0x0061c000 + 63)! FAILED! : Uh oh. Erase/write failed. Checking if anything has changed.
What I'm still missing is how it relates to the change. […]
Now I'm feeling trolled. How often have I told you that the SCIP bit isn't related to sync'ing multiple processes? I've lost count.
I guess after all, it's best if you'd write a commit message about SCPI only and leave the confusion out of it. Also, please don't add a reference to the bug tracker. I think that would be the best way to avoid further confusion. If you still have questions, please ask your colleagues. No need to bother independent open-source projects with Google-internal confusion.
https://review.coreboot.org/c/flashrom/+/61854/comment/b866b5fa_a23fe6e1 PS7, Line 24: BUG=b:215255210
I don't see any answer. Please never again mark my comments as resolved. […]
I want to make sure the reference to that bug won't do any damage. I can't access it so that makes it very hard for me. It seems that bug is about futility (a tool from a different project) not using the cros-flashrom big lock anymore (a concept from another project). But you reference it here as if it was associated with your change about SCIP, which it is only indirectly.
Please just remove the reference.
https://review.coreboot.org/c/flashrom/+/61854/comment/9a1403ef_c14e1ef7 PS7, Line 25: TEST=Concurrent flashrom access is not throwing timeout.
Please also test older platforms, not just the newest (also, platforms that are not supported yet don't matter). If you need help with testing you can always ask on the mailing list and IRC.
Sorry, I don't have those older platform POC information. I will try to set a context with those owners informally. Looking at older platform EDS specification, I don't expect anything would behave differently there as this is same HW seq on Intel platform started with SKL.
What's POC in this context?
Owners of what? 14 year old platforms? Please just do what open-source developers do, ask for help in the community. You usually get better and quicker answers this way.
how since then so many years AU worked without being bothered about checking this SCIP bit in HW SEQ on older platform, I don't have that answer either with me. But for sure SW SEQ platform do use this SCIP bit checking.
Obviously because futility moved from calling cros flashrom to using lib- flashrom lately. Why do I know that? Possibly because I'm paying attention during reviews. Please try to do so too.