Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/38209 )
Change subject: raiden_debug: Upstream ChromiumOS servo debug board prog
......................................................................
Patch Set 5:
(2 comments)
https://review.coreboot.org/c/flashrom/+/38209/5/raiden_debug_spi.c
File raiden_debug_spi.c:
https://review.coreboot.org/c/flashrom/+/38209/5/raiden_debug_spi.c@75
PS5, Line 75: * This timeout is so large because the Raiden SPI timeout is 800ms.
Where is the additional 200 coming from?
Done.
https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+...
https://review.coreboot.org/c/flashrom/+/38209/5/raiden_debug_spi.c@94
PS5, Line 94: msg_perr("Raiden: invalid write_count of %d\n", write_count);
invalid -> Invalid?
Done.
https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+...
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