[flashrom-gerrit] [S] Change in flashrom[main]: flashchips: Add GD25LQ255E

[Nikolai Artemiev (Code Review)]

Nikolai Artemiev has submitted this change. ( https://review.coreboot.org/c/flashrom/+/79088?usp=email )

Change subject: flashchips: Add GD25LQ255E
......................................................................

flashchips: Add GD25LQ255E

datasheet: https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20221129/DS-00...

BUG=b:311336475
TEST=(1) flashrom -p internal -r /tmp/bios.bin, get "SUCCESS" result
     (2) flashrom -p internal -w /tmp/bios.bin, get "SUCCESS" result
     (3) flashrom -i RW_MRC_CACHE -E, get "SUCCESS" result

Change-Id: I0d780255ed6772f4aa406584acf071a7ddd6da47
Signed-off-by: Tyler Wang 
Reviewed-on: https://review.coreboot.org/c/flashrom/+/79088
Tested-by: build bot (Jenkins) 
Reviewed-by: Hsuan-ting Chen 
Reviewed-by: Nikolai Artemiev 
---
M flashchips.c
M include/flashchips.h
2 files changed, 49 insertions(+), 0 deletions(-)

Approvals:
  Nikolai Artemiev: Looks good to me, approved
  Hsuan-ting Chen: Looks good to me, approved
  build bot (Jenkins): Verified

diff --git a/flashchips.c b/flashchips.c
index a4605bd..8c2fecd 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -6549,6 +6549,54 @@

{
    	.vendor		= "GigaDevice",
+		.name		= "GD25LQ255E",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= GIGADEVICE_ID,
+		.model_id	= GIGADEVICE_GD25LQ255E,
+		.total_size	= 32768,
+		.page_size	= 256,
+		/* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */
+		.feature_bits	= FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_WRSR_EXT2 | FEATURE_4BA,
+		.tested		= TEST_OK_PREW,
+		.probe		= PROBE_SPI_RDID,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {4 * 1024, 8192} },
+				.block_erase = SPI_BLOCK_ERASE_21,
+			}, {
+				.eraseblocks = { {4 * 1024, 8192} },
+				.block_erase = SPI_BLOCK_ERASE_20,
+			}, {
+				.eraseblocks = { {32 * 1024, 1024} },
+				.block_erase = SPI_BLOCK_ERASE_5C,
+			}, {
+				.eraseblocks = { {32 * 1024, 1024} },
+				.block_erase = SPI_BLOCK_ERASE_52,
+			}, {
+				.eraseblocks = { {64 * 1024, 512} },
+				.block_erase = SPI_BLOCK_ERASE_DC,
+			}, {
+				.eraseblocks = { {64 * 1024, 512} },
+				.block_erase = SPI_BLOCK_ERASE_D8,
+			}, {
+				.eraseblocks = { {32 * 1024 * 1024, 1} },
+				.block_erase = SPI_BLOCK_ERASE_60,
+			}, {
+				.eraseblocks = { {32 * 1024 * 1024, 1} },
+				.block_erase = SPI_BLOCK_ERASE_C7,
+			}
+		},
+		.printlock	= SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD,
+		.unlock		= SPI_DISABLE_BLOCKPROTECT_BP4_SRWD, /* TODO: 2nd status reg (read with 0x35) */
+		.write		= SPI_CHIP_WRITE256,
+		.read		= SPI_CHIP_READ, /* Fast read (0x0B) and multi I/O supported */
+		.voltage	= {1650, 2000},
+	},
+
+	{
+		.vendor		= "GigaDevice",
    	.name		= "GD25LQ16",
    	.bustype	= BUS_SPI,
    	.manufacture_id	= GIGADEVICE_ID,
diff --git a/include/flashchips.h b/include/flashchips.h
index 17a6fc4..d676cda 100644
--- a/include/flashchips.h
+++ b/include/flashchips.h
@@ -402,6 +402,7 @@
 #define GIGADEVICE_GD25LQ32	0x6016
 #define GIGADEVICE_GD25LQ64	0x6017	/* Same as GD25LQ64B (which is faster) */
 #define GIGADEVICE_GD25LQ128CD	0x6018
+#define GIGADEVICE_GD25LQ255E	0x6019
 #define GIGADEVICE_GD25WQ80E	0x6514
 #define GIGADEVICE_GD29GL064CAB	0x7E0601