Attention is currently required from: Nico Huber, Edward O'Callaghan, Angel Pons, Sergii Dmytruk. Nikolai Artemiev has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58477 )
Change subject: flashchips: add writeprotect bit layout map to chips ......................................................................
Patch Set 27:
(1 comment)
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/58477/comment/28aed946_6e1b439c PS20, Line 6353: .tb = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like TB */ : .sec = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */
On the other hand, we can't edit wiki before patch is merged: that would make wiki refer to somethin […]
Just a first draft of what we should say, happy to revise:
(add as another bullet on the list of chip fields):
`.reg_bits` contains information about the configuration bits in the chip's registers and is required to support write protection operations on the chip.
For example, `.cmp = {STATUS2, 6, RW}` indicates that the complement bit (CMP) is the 6th bit of the chip's 2nd status register and that it is writable. If multiple bits are used to define a single value, they are written as an array with the least-significant bit first, e.g. `.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}}`.
See `struct reg_bit_info` in flash.h for details on what each of the configuration bits does.
Note that some datasheets use inconsistent names for configuration bits. In particular, bits that act like TB/SEC/CMP are sometimes called BP3/BP4/etc. Bits should be named according their functions and a note should be added if they differ from the datasheet, e.g. ``` .sec = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */ ```