[flashrom-gerrit] Change in flashrom[master]: ichspi: Add support for 64KB SPI erase operation

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/62870 )

Change subject: ichspi: Add support for 64KB SPI erase operation
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ichspi: Add support for 64KB SPI erase operation

This patch add support for SPI HW sequencing 64KB erase operation based
on erase_block size and `only_4k` flag is not set.

BUG=b:223630977
TEST=Able to perform SPI erase operation on brya.

Signed-off-by: Subrata Banik 
Change-Id: I534471dc8eeeed66e5cbc44baadcd2448d21d34d
---
M ichspi.c
1 file changed, 6 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/70/62870/1

diff --git a/ichspi.c b/ichspi.c
index d0692d0..fe2f78f 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -1451,7 +1451,7 @@
 static int ich_hwseq_block_erase(struct flashctx *flash, unsigned int addr,
    			 unsigned int len)
 {
-	uint32_t erase_block;
+	uint32_t erase_block, erase_cycle;

erase_block = ich_hwseq_get_erase_block_size(addr);
    if (len != erase_block) {
@@ -1477,7 +1477,11 @@
    }

msg_pdbg("Erasing %d bytes starting at 0x%06x.\n", len, addr);
-	if (ich_exec_sync_hwseq_xfer(HSFC_CYCLE_4K_ERASE, addr, 0))
+	if (erase_block == 64 * KiB)
+		erase_cycle = HSFC_CYCLE_64K_ERASE;
+	else
+		erase_cycle = HSFC_CYCLE_4K_ERASE;
+	if (ich_exec_sync_hwseq_xfer(erase_cycle, addr, 0))
    	return -1;

return 0;