Attention is currently required from: Edward O'Callaghan, Angel Pons.
Sam McNally has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/71576 )
Change subject: chipset_enable.c: Add TL UP3 and UP4/Y id's
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Patch Set 1:
(1 comment)
File chipset_enable.c:
https://review.coreboot.org/c/flashrom/+/71576/comment/637d65cb_688eb081
PS1, Line 2083: {0x8086, 0xa083, B_S, DEP, "Intel", "Tiger Lake U Premium 3", enable_flash_pch500},
Let's keep it, but mark it as untested (change `DEP` to `NT`).
Sure; going off the coreboot #define, I think this should be "Tiger Lake Base UP4" or "Tiger Lake U Base", depending on the naming scheme used for the others..
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