[flashrom-gerrit] [XS] Change in flashrom[main]: erasure_layout: Remove redundant `verify_range` call from `erase_write`

[Carly Zlabek (Code Review)]

Attention is currently required from: Aarya, Anastasia Klimchuk, Vincent Fazio.

Carly Zlabek has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/79354?usp=email )

Change subject: erasure_layout: Remove redundant `verify_range` call from `erase_write`
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Patch Set 1:

(1 comment)

Patchset:

PS1: 
Testing Summary:

3 types of testing:
    1. Switching from 1 bios version to another
    2. Erasing the entire chip
    3. Programming a bios starting from empty chip contents

Averages (seconds):

Note: The summation of the individual parts compared to the total may differ by a couple seconds, the timing captures were not exactly back to back.

Legacy Erase Path:
    - The field 'Verify erase' was lumped into `Erase relevant parts` in the New Erase Path test results

1. Read previous contents: 57.025
       Erase relevant parts: 27.336
       Verify erase: 2.655
       Write time: 9.323
       Verify write: 58.808
       Total execution time: 157.591

2. Read previous contents: 0
       Erase chip contents: 198.692
       Verify erase: 32.804
       Write time: 0
       Verify write: 0
       Total execution time: 241.46

3. Read previous contents: 56.980
       Erase chip contents: 0
       Verify erase: 0
       Write time: 23.563
       Verify write: 58.786
       Total execution time: 141.540

New Erase Path:
    
    1. Read previous contents: 56.802
       Erase relevant parts: 25.697
       Write time: 10.342
       Verify write: 57.510
       Verify contents: 58.718
       Total execution time: 209.89

2. Erase chip contents: 141.953
       Write to chip: 0.091 (artifact from timing capture location)
       Verify contents: 57.423
       Total execution time: 200.929

3. Read previous contents: 57.110
       Erase relevant parts: 0 (already empty)
       Write time: 25.206
       Verify write: 57.502
       Verify contents: 58.902
       Total execution time: 199.37

New Erase Path Sans Redundant Verification:
    
    1. Read previous contents: 56.991
       Erase relevant parts: 25.679
       Write time: 10.323
       Verify contents: 58.799
       Total execution time: 153.451

2. Erase chip contents: 143.002
       Write to chip: 0.088 (artifact from timing capture location)
       Total execution time: 143.646

3. Read previous contents: 56.939
       Erase relevant parts: 0 (already empty)
       Write time: 25.174
       Verify contents: 58.692
       Total execution time: 141.396