[flashrom-gerrit] Change in flashrom[master]: chipset_enable.c: Disable SPI on ICH7 if booted from LPC

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/40401 )

Change subject: chipset_enable.c: Disable SPI on ICH7 if booted from LPC
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Patch Set 1: Code-Review+2

flashrom# time ./flashrom -p internal 
flashrom v1.2-26-ga055d53 on Linux 5.4.0-4-amd64 (x86_64)
flashrom is free software, get the source code at https://flashrom.org

Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
Found chipset "Intel ICH7/ICH7R".
Enabling flash write... OK.
Found SST flash chip "SST49LF004A/B" (512 kB, FWH) mapped at physical address 0x00000000fff80000.
No operations were specified.

real	0m0,013s
user	0m0,000s
sys	0m0,013s