Attention is currently required from: Sam McNally, Nico Huber, Rizwan Qureshi, Edward O'Callaghan, Angel Pons.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62251 )
Change subject: ichspi: Add Alder Lake support
......................................................................
Patch Set 11:
(1 comment)
File chipset_enable.c:
https://review.coreboot.org/c/flashrom/+/62251/comment/1dd95ab1_b7814d20
PS10, Line 2154: {0x8086, 0x7aa4, B_S, DEP, "Intel", "Alder Lake-S", enable_flash_pch600},
No, he said it can be removed.
what is the point of adding unused PCI id when we don't have ADL-S support in general in open-source platform. Don't know why we are exhort on everything small thing.
That a PCH of the same generation behaves differently is very unlikely, hence
we usually add all IDs at once and hence we have the tags to reflect the test
status. Please don't ignore this projects infrastructure and processes.
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