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Sam McNally has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62251 )
Change subject: ichspi: Add Alder Lake support
......................................................................
Patch Set 12:
(2 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/62251/comment/f2e4b91c_1b362f84
PS12, Line 12: TEST=```localhost ~ # flashrom --flash-name
This tests the changes to `guess_ich_chipset_from_content()`, please check the flashrom log to ver […]
Thanks for that detail.
With Nivviks/ADL-N and Brya/ADL-P:
```
Reading ich descriptor... Reading 4096 bytes starting at 0x000000.
done.
Assuming chipset '600 series Alder Point'.
Added layout entry 00000000 - 00000fff named fd
Added layout entry 00500000 - 01ffffff named bios
Added layout entry 00001000 - 004fffff named me
```
File ich_descriptors.c:
https://review.coreboot.org/c/flashrom/+/62251/comment/eddcfd4c_5ad9d2ee
PS12, Line 307: case CHIPSET_600_SERIES_ALDER_POINT:
Looking at the ADL-P SPI Guide Rev. 1.24, it shows the same numbers as […]
From the values available in the FIT tool, I think you're right.
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