Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/70030 )
(
2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: tree/: Make probe_opcode() flashctx argument const ......................................................................
tree/: Make probe_opcode() flashctx argument const
Probing an opcode generally shouldn't involve mutating the flashctx state and currently no probe_opcode functions do that.
Make the flashctx arg const so that call sites don't need to have a non-const pointer.
BUG=b:253715389,b:253713774 BRANCH=none TEST=ninja test
Change-Id: I19e98be50d682de2d2715417f8b7b8c62b871617 Signed-off-by: Nikolai Artemiev nartemiev@google.com Reviewed-on: https://review.coreboot.org/c/flashrom/+/70030 Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Edward O'Callaghan quasisec@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M dummyflasher.c M ichspi.c M include/programmer.h M spi.c 4 files changed, 30 insertions(+), 6 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Edward O'Callaghan: Looks good to me, approved
diff --git a/dummyflasher.c b/dummyflasher.c index 35cdfef..da4efc7 100644 --- a/dummyflasher.c +++ b/dummyflasher.c @@ -122,10 +122,10 @@ emu_data->spi_write_256_chunksize); }
-static bool dummy_spi_probe_opcode(struct flashctx *flash, uint8_t opcode) +static bool dummy_spi_probe_opcode(const struct flashctx *flash, uint8_t opcode) { size_t i; - struct emu_data *emu_data = flash->mst->spi.data; + const struct emu_data *emu_data = flash->mst->spi.data; for (i = 0; i < emu_data->spi_blacklist_size; i++) { if (emu_data->spi_blacklist[i] == opcode) return false; diff --git a/ichspi.c b/ichspi.c index 62d1799..4588502 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1661,7 +1661,7 @@ return ret; }
-static bool ich_spi_probe_opcode(struct flashctx *flash, uint8_t opcode) +static bool ich_spi_probe_opcode(const struct flashctx *flash, uint8_t opcode) { return find_opcode(curopcodes, opcode) >= 0; } diff --git a/include/programmer.h b/include/programmer.h index 55e300a..16448ea 100644 --- a/include/programmer.h +++ b/include/programmer.h @@ -312,7 +312,7 @@ int (*write_256)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); int (*write_aai)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); int (*shutdown)(void *data); - bool (*probe_opcode)(struct flashctx *flash, uint8_t opcode); + bool (*probe_opcode)(const struct flashctx *flash, uint8_t opcode); void *data; };
@@ -322,7 +322,7 @@ int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); int default_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); int default_spi_write_aai(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); -bool default_spi_probe_opcode(struct flashctx *flash, uint8_t opcode); +bool default_spi_probe_opcode(const struct flashctx *flash, uint8_t opcode); int register_spi_master(const struct spi_master *mst, void *data);
/* The following enum is needed by ich_descriptor_tool and ich* code as well as in chipset_enable.c. */ diff --git a/spi.c b/spi.c index 38d8d01..eeb1362 100644 --- a/spi.c +++ b/spi.c @@ -134,7 +134,7 @@ return flash->mst->spi.write_aai(flash, buf, start, len); }
-bool default_spi_probe_opcode(struct flashctx *flash, uint8_t opcode) +bool default_spi_probe_opcode(const struct flashctx *flash, uint8_t opcode) { return true; }