Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/71269 )
Change subject: flashrom.c: Guard against sending spi commands on non-spi mst ......................................................................
flashrom.c: Guard against sending spi commands on non-spi mst
Validate (flash->chip->bustype == BUS_SPI) as ich copies the chip flags in the opaque master and tries incorrectly to issue 4BA commands which results in failure.
The issue was detected only in the case of chips >16MB, in this case 'W25Q256FV' that has the feature bits: ``` .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_ENTER_WREN | FEATURE_4BA_EAR_C5C8 | FEATURE_4BA_READ | FEATURE_4BA_FAST_READ | FEATURE_WRSR2, ``` The regression was noticed from, commit 0741727925b841c2479b993204ce58c5eb75185a ichspi.c: Read chip ID and use it to populate `flash->chip`
TEST=In the case of 'W25Q256FV' on TigerLake.
Change-Id: I7cce4f9c032d33c01bf616e27a50b9727a40fe1b Signed-off-by: Edward O'Callaghan quasisec@google.com --- M flashrom.c 1 file changed, 28 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/69/71269/1
diff --git a/flashrom.c b/flashrom.c index 62f38f8..f6862c4 100644 --- a/flashrom.c +++ b/flashrom.c @@ -1944,7 +1944,8 @@ }
/* Enable/disable 4-byte addressing mode if flash chip supports it */ - if (flash->chip->feature_bits & (FEATURE_4BA_ENTER | FEATURE_4BA_ENTER_WREN | FEATURE_4BA_ENTER_EAR7)) { + if ((flash->chip->bustype == BUS_SPI) && + (flash->chip->feature_bits & (FEATURE_4BA_ENTER | FEATURE_4BA_ENTER_WREN | FEATURE_4BA_ENTER_EAR7))) { int ret; if (spi_master_4ba(flash)) ret = spi_enter_4ba(flash);