[flashrom-gerrit] Change in flashrom[master]: ichspi.c: Check SPI Cycle In-Progress prior start HW Seq

[Subrata Banik (Code Review)]

Attention is currently required from: Patrick Georgi, Rizwan Qureshi, Stefan Reinauer, Sridhar Siricilla, Angel Pons, Alex Levin, YH Lin, Nico Huber, Martin Roth - Personal, Caveh Jalali, David Hendricks, Tim Wawrzynczak, Nick Vaccaro, Boris Mittelberg.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/61854 )

Change subject: ichspi.c: Check SPI Cycle In-Progress prior start HW Seq
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Patch Set 11:

(1 comment)

Commit Message:

https://review.coreboot.org/c/flashrom/+/61854/comment/1d347050_ec49aa73 
PS7, Line 17: Without this synchronisation being implemented, flashrom is running
            : into below error:
            : 
            : Erasing and writing flash chip... Timeout error between offset
            : 0x0061c000 and 0x0061c03f (= 0x0061c000 + 63)! FAILED!
            : Uh oh. Erase/write failed. Checking if anything has changed.
> Now I'm feeling trolled. How often have I told you that the SCIP bit isn't related
> to sync'ing multiple processes? I've lost count.
>
> I guess after all, it's best if you'd write a commit message about SCPI only and
> leave the confusion out of it. Also, please don't add a reference to the bug
> tracker. I think that would be the best way to avoid further confusion. If you
> still have questions, please ask your colleagues. No need to bother independent
> open-source projects with Google-internal confusion.

if removing the bug id makes you happy and let this CL see the light, I'm happy to move in that way.