Attention is currently required from: Bill XIE, Nikolai Artemiev, Peter Marheine.
Anastasia Klimchuk has posted comments on this change by Bill XIE. ( https://review.coreboot.org/c/flashrom/+/84253?usp=email )
Change subject: ichspi: Restore Sector erase opcode after send command ......................................................................
Patch Set 1:
(2 comments)
File ichspi.c:
https://review.coreboot.org/c/flashrom/+/84253/comment/28a8b295_4d4dbfde?usp... : PS1, Line 664: int oppos = 2; // use original JEDEC_BE_D8 offset I made a separate patch CB:84567 in case it end up being useful.
It's worth noting that newer CPUs don't support this code path (they use hwseq)
Oh, maybe that partially explains why the issue was not noticed before...
https://review.coreboot.org/c/flashrom/+/84253/comment/739b62fa_a396c952?usp... : PS1, Line 1843: : static bool ich_spi_probe_opcode(const struct flashctx *flash, uint8_t opcode) : { : return find_opcode(curopcodes, opcode) >= 0;
Rather than restoring JEDEC_SE after every ich_spi_send_command() call, we could add a check here to […]
Oh this is really clever solution :) Thank you!
If we go that way, we can treat other erase opcodes in the same way? Specifically, in the POSSIBLE_OPCODES there are: JEDEC_SE JEDEC_BE_52 JEDEC_BE_D8 JEDEC_CE_C7
Maybe we can add the check here for all those?
Bill, would you agree to change your patch, and test the different solution? As a plan B I can upload new version of the patch, but asking you first because you are the author (and you did all the debugging). Also, in any case, original author of the patch stays (even if someone uploads new version)