Attention is currently required from: Patrick Georgi, Martin Roth, Subrata Banik, Caveh Jalali, Stefan Reinauer, Tim Wawrzynczak, Sridhar Siricilla, Angel Pons, Alex Levin, Nick Vaccaro, YH Lin, Boris Mittelberg.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/61854 )
Change subject: ichspi.c: Check SPI Cycle In-Progress prior start HW Seq
......................................................................
Patch Set 6:
(1 comment)
Patchset:
PS6:
@Nico, here is guideline above giving `-2` in coreboot code review, looks like you are ignoring the prior comments and discussion about this thread to understand what is the chipset recommendation from Intel and what is being done in flashrom. As suggested below, please bring your recommendation along with `-2`.
My recommendation was given in my very first comment on this change and was
repeated later. You choose to ignore it from the beginning. I can't help you
there any more.
Nobody is walking away here. It will just take time to answer your questions
(I tried to answer everything that was on topic so far). You can't expect
reviewers to quit their day jobs to attend your changes full-time.
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