Nico Huber has posted comments on this change. ( https://review.coreboot.org/23338 )
Change subject: digilent_spi: add a driver for the iCEblink40 development board ......................................................................
Patch Set 8:
(1 comment)
https://review.coreboot.org/#/c/23338/4/digilent_spi.c File digilent_spi.c:
https://review.coreboot.org/#/c/23338/4/digilent_spi.c@276 PS4, Line 276: ret = spi_start_io(read_follows, writecnt); : if (ret != 0)
The overhead is already reduced by setting it to 252. Now, I agree, […]
Hmmm, might have overlooked something here. The "empirically determined" 252 were tested with 3B addresses I guess? but we advertise 4B address support. So this should probably be 251B (256B - 4B address - 1B opcode).
(One nice day, this should be refactored throughout flashrom, so the SPI drivers wouldn't have to care about the protocol overhead.)