Attention is currently required from: Xiang W, Edward O'Callaghan, Angel Pons.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/49255 )
Change subject: bitbang-spi.c: support clock polarity and phase
......................................................................
Patch Set 26:
(1 comment)
Commit Message:
https://review.coreboot.org/c/flashrom/+/49255/comment/fff68f52_b85ef938
PS1, Line 8:
- implements a better mode 0
Actually, it's not there yet, but there is potential. I see two
things in the original implementation:
* the spurious mosi settings
* the very first clock setting in the first loop-iteration for each byte could be skipped.
--
To view, visit
https://review.coreboot.org/c/flashrom/+/49255
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I04c1dfe132d756119229b27c3cd611d1be1abc8d
Gerrit-Change-Number: 49255
Gerrit-PatchSet: 26
Gerrit-Owner: Xiang W
wxjstz@126.com
Gerrit-Reviewer: Anastasia Klimchuk
aklm@chromium.org
Gerrit-Reviewer: Angel Pons
th3fanbus@gmail.com
Gerrit-Reviewer: Edward O'Callaghan
quasisec@chromium.org
Gerrit-Reviewer: Stefan Reinauer
stefan.reinauer@coreboot.org
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Nico Huber
nico.h@gmx.de
Gerrit-CC: Paul Menzel
paulepanter@mailbox.org
Gerrit-CC: Shawn C
citypw@hardenedlinux.org
Gerrit-Attention: Xiang W
wxjstz@126.com
Gerrit-Attention: Edward O'Callaghan
quasisec@chromium.org
Gerrit-Attention: Angel Pons
th3fanbus@gmail.com
Gerrit-Comment-Date: Thu, 10 Jun 2021 20:58:32 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Nico Huber
nico.h@gmx.de
Comment-In-Reply-To: Xiang W
wxjstz@126.com
Comment-In-Reply-To: Edward O'Callaghan
quasisec@chromium.org
Comment-In-Reply-To: Angel Pons
th3fanbus@gmail.com
Gerrit-MessageType: comment