Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/71206 )
Change subject: flashchips: Remove FEATURE_4BA_WREN for MT25QL128 and mark as tested ......................................................................
flashchips: Remove FEATURE_4BA_WREN for MT25QL128 and mark as tested
Using both a Dediprog SF100 and a Bus Pirate, read and erase works correctly on a MT25QL128 but writes were failing to take effect. Currently, the entry in flashchips.c indicates that this device supports 4-byte addressing. Micron's datasheet indicates that it does not. After removing FEATURE_4BA_WREN from feature_bits, both SF100 and Bus Pirate were able to successfully read, erase, and write a MT25QL128 so also marking as tested.
Change-Id: I6341456c722840a413bd2c51fe9a78bbda5cdbab Signed-off-by: Rick Altherr kc8apf@kc8apf.net Reviewed-on: https://review.coreboot.org/c/flashrom/+/71206 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Anastasia Klimchuk aklm@chromium.org --- M flashchips.c 1 file changed, 24 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Anastasia Klimchuk: Looks good to me, approved
diff --git a/flashchips.c b/flashchips.c index 9818eac..625fe62 100644 --- a/flashchips.c +++ b/flashchips.c @@ -11997,8 +11997,8 @@ .page_size = 256, /* supports SFDP */ /* OTP: 64B total; read 0x4B, write 0x42 */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN, - .tested = TEST_UNTESTED, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_OK_PREW, .probe = PROBE_SPI_RDID, .probe_timing = TIMING_ZERO, .block_erasers =