Hello David Hendricks, Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/22383
to look at the new patch set (#2).
Change subject: spi25: Use common code for nbyte read/write and block erase ......................................................................
spi25: Use common code for nbyte read/write and block erase
Introduce spi_prepare_address() and spi_write_cmd() and use them in nbyte_program, nbyte_read and block-erase procedures. The former abstracts over the address part of a SPI command to make it exten- sible for 4-byte adressing. spi_write_cmd() implements a WREN + write operation with address and optionally up to 256 bytes of data. It provides a common path to reduce overall redundancy.
Also, reduce the polling delay in spi_block_erase_c4() from 500s to 500ms as the comment suggests.
Change-Id: Ibc1ae48acbfbd427a30bcd64bdc080dc3dc20503 Signed-off-by: Nico Huber nico.h@gmx.de --- M chipdrivers.h M spi.h M spi25.c 3 files changed, 105 insertions(+), 429 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/83/22383/2