Attention is currently required from: Nico Huber, Edward O'Callaghan, Nikolai Artemiev, Sergii Dmytruk.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58477 )
Change subject: flashchips: add writeprotect bit layout map to chips
......................................................................
Patch Set 20:
(1 comment)
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/58477/comment/32ff0615_36e77b49
PS20, Line 6353: .tb = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like TB */
: .sec = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */
Huh, I would've expected BP3 and BP4 to work like the other BPx bits.
--
To view, visit
https://review.coreboot.org/c/flashrom/+/58477
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: Id08d77e6d4ca5109c0d698271146d026dbc21284
Gerrit-Change-Number: 58477
Gerrit-PatchSet: 20
Gerrit-Owner: Nikolai Artemiev
nartemiev@google.com
Gerrit-Reviewer: Anastasia Klimchuk
aklm@chromium.org
Gerrit-Reviewer: Angel Pons
th3fanbus@gmail.com
Gerrit-Reviewer: Edward O'Callaghan
quasisec@chromium.org
Gerrit-Reviewer: Nico Huber
nico.h@gmx.de
Gerrit-Reviewer: Sergii Dmytruk
sergii.dmytruk@3mdeb.com
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Paul Menzel
paulepanter@mailbox.org
Gerrit-Attention: Nico Huber
nico.h@gmx.de
Gerrit-Attention: Edward O'Callaghan
quasisec@chromium.org
Gerrit-Attention: Nikolai Artemiev
nartemiev@google.com
Gerrit-Attention: Sergii Dmytruk
sergii.dmytruk@3mdeb.com
Gerrit-Comment-Date: Tue, 14 Dec 2021 10:34:27 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment