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[M] Change in flashrom[master]: ichspi.c: Clean up HSFC FCYCLE definitions
by Edward O'Callaghan (Code Review) 15 Dec '22

15 Dec '22

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/70458 ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: ichspi.c: Clean up HSFC FCYCLE definitions ...................................................................... ichspi.c: Clean up HSFC FCYCLE definitions Move the FCYCLE bit definitions out of the ICH9 definitions and into their own section because they are used by PCH100 as well. Rename HSFC_FCYCLE to ICH9_HSFC_FCYCLE because it is specific to ICH9. BUG=b:253715389,b:253713774 BRANCH=none TEST=builds Change-Id: I0996c5331837276049241600e0ffac21a47ec3af Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/70458 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec(a)chromium.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Sam McNally <sammc(a)google.com> --- M ichspi.c 1 file changed, 53 insertions(+), 22 deletions(-) Approvals: build bot (Jenkins): Verified Edward O'Callaghan: Looks good to me, approved Sam McNally: Looks good to me, approved Subrata Banik: Looks good to me, approved diff --git a/ichspi.c b/ichspi.c index 43590d6..0b88672 100644 --- a/ichspi.c +++ b/ichspi.c @@ -46,9 +46,15 @@ * however we still treat them separately in order to reuse code. */ -/* Changed HSFC Control bits */ /* - * 4 bits to represents the FCYCLE operation for PCH as: + * HSFC Control bits + * + * FCYCLE is a 2 bit field (HSFC bits 1-2) on ICH9 and 4 bit field + * (HSFC bits 1-4) on PCH100. + * + * ICH9 and PCH100 use the same FCYCLE values for flash operations, + * however FCYCLE values above 3 are only supported by PCH100. + * * 0: SPI Read * 2: SPI Write * 3: SPI Erase 4K @@ -56,9 +62,21 @@ * 6: SPI RDID * 7: SPI Write Status * 8: SPI Read Status - */ + */ +#define HSFC_FGO_OFF 0 +#define HSFC_FGO (0x1 << HSFC_FGO_OFF) +#define HSFC_FCYCLE_MASK(n) ((n) << HSFC_FCYCLE_OFF) +#define HSFC_FCYCLE_OFF 1 +#define HSFC_CYCLE_READ HSFC_FCYCLE_MASK(0x0) +#define HSFC_CYCLE_WRITE HSFC_FCYCLE_MASK(0x2) +#define HSFC_CYCLE_BLOCK_ERASE HSFC_FCYCLE_MASK(0x3) +#define HSFC_CYCLE_RDID HSFC_FCYCLE_MASK(0x6) +#define HSFC_CYCLE_WR_STATUS HSFC_FCYCLE_MASK(0x7) +#define HSFC_CYCLE_RD_STATUS HSFC_FCYCLE_MASK(0x8) + +/* PCH100 controller register definition */ +#define PCH100_HSFC_FCYCLE_OFF 1 #define PCH100_HSFC_FCYCLE_BIT_WIDTH 0xf -#define PCH100_HSFC_FCYCLE_OFF (17 - 16) /* 1-4: FLASH Cycle */ #define PCH100_HSFC_FCYCLE HSFC_FCYCLE_MASK(PCH100_HSFC_FCYCLE_BIT_WIDTH) /* New HSFC Control bit */ #define PCH100_HSFC_WET_OFF (21 - 16) /* 5: Write Enable Type */ @@ -117,23 +135,12 @@ #define HSFS_FLOCKDN (0x1 << HSFS_FLOCKDN_OFF) #define ICH9_REG_HSFC 0x06 /* 16 Bits Hardware Sequencing Flash Control */ -#define HSFC_FGO_OFF 0 /* 0: Flash Cycle Go */ -#define HSFC_FGO (0x1 << HSFC_FGO_OFF) -/* - * 2 bits to represents the FCYCLE operation for ICH9 as: - * 0: SPI Read - * 2: SPI Write - * 3: SPI Block Erase - */ + + /* 0: Flash Cycle Go */ + /* 1-2: FLASH Cycle */ +#define ICH9_HSFC_FCYCLE_OFF 1 #define ICH9_HSFC_FCYCLE_BIT_WIDTH 3 -#define HSFC_FCYCLE_OFF 1 /* 1-2: FLASH Cycle */ -#define HSFC_FCYCLE_MASK(n) ((n) << HSFC_FCYCLE_OFF) -#define HSFC_FCYCLE HSFC_FCYCLE_MASK(ICH9_HSFC_FCYCLE_BIT_WIDTH) -#define HSFC_CYCLE_READ HSFC_FCYCLE_MASK(0) -#define HSFC_CYCLE_WRITE HSFC_FCYCLE_MASK(2) -#define HSFC_CYCLE_BLOCK_ERASE HSFC_FCYCLE_MASK(3) -#define HSFC_CYCLE_WR_STATUS HSFC_FCYCLE_MASK(7) -#define HSFC_CYCLE_RD_STATUS HSFC_FCYCLE_MASK(8) +#define ICH9_HSFC_FCYCLE HSFC_FCYCLE_MASK(ICH9_HSFC_FCYCLE_BIT_WIDTH) /* 3-7: reserved */ #define HSFC_FDBC_OFF 8 /* 8-13: Flash Data Byte Count */ #define HSFC_FDBC (0x3f << HSFC_FDBC_OFF) @@ -492,7 +499,7 @@ pprint_reg(PCH100_HSFC, WET, reg_val, ", "); break; default: - pprint_reg(HSFC, FCYCLE, reg_val, ", "); + pprint_reg(ICH9_HSFC, FCYCLE, reg_val, ", "); break; } pprint_reg(HSFC, FDBC, reg_val, ", "); @@ -1927,7 +1934,7 @@ swseq->reg_opmenu = ICH9_REG_OPMENU; hwseq->addr_mask = ICH9_FADDR_FLA; hwseq->only_4k = false; - hwseq->hsfc_fcycle = HSFC_FCYCLE; + hwseq->hsfc_fcycle = ICH9_HSFC_FCYCLE; break; } -- To view, visit https://review.coreboot.org/c/flashrom/+/70458 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I0996c5331837276049241600e0ffac21a47ec3af Gerrit-Change-Number: 70458 Gerrit-PatchSet: 3 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in flashrom[master]: ichspi.c: Clean up HSFC FCYCLE definitions
by Sam McNally (Code Review) 15 Dec '22

15 Dec '22

Attention is currently required from: Nikolai Artemiev. Sam McNally has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/70458 ) Change subject: ichspi.c: Clean up HSFC FCYCLE definitions ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/70458 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I0996c5331837276049241600e0ffac21a47ec3af Gerrit-Change-Number: 70458 Gerrit-PatchSet: 1 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Thu, 15 Dec 2022 02:02:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in flashrom[master]: layout: Add new line to out of memory error message
by Edward O'Callaghan (Code Review) 15 Dec '22

15 Dec '22

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/70552 ) Change subject: layout: Add new line to out of memory error message ...................................................................... layout: Add new line to out of memory error message Change-Id: I1f5134378b7967931d52ee0556e2061c9a30d27f Signed-off-by: Anastasia Klimchuk <aklm(a)chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/70552 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec(a)chromium.org> --- M layout.c 1 file changed, 16 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified Edward O'Callaghan: Looks good to me, approved diff --git a/layout.c b/layout.c index 350e49e..3f2abb9 100644 --- a/layout.c +++ b/layout.c @@ -135,13 +135,13 @@ if (colon) { tmp_name = strndup(arg, colon - arg); if (!tmp_name) { - msg_gerr("Out of memory"); + msg_gerr("Out of memory\n"); goto error; } tmp_file = strdup(colon + 1); if (!tmp_file) { - msg_gerr("Out of memory"); + msg_gerr("Out of memory\n"); goto error; } } else { @@ -178,7 +178,7 @@ tmp = malloc(sizeof(*tmp)); if (tmp == NULL) { - msg_gerr("Out of memory"); + msg_gerr("Out of memory\n"); goto error; } -- To view, visit https://review.coreboot.org/c/flashrom/+/70552 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I1f5134378b7967931d52ee0556e2061c9a30d27f Gerrit-Change-Number: 70552 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in flashrom[master]: layout: Extract parsing include args into a separate function
by Edward O'Callaghan (Code Review) 15 Dec '22

15 Dec '22

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/70539 ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: layout: Extract parsing include args into a separate function ...................................................................... layout: Extract parsing include args into a separate function Change-Id: Iba2971846938fe95412f0a69ff3c069ee2d049b6 Signed-off-by: Anastasia Klimchuk <aklm(a)chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/70539 Reviewed-by: Edward O'Callaghan <quasisec(a)chromium.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M layout.c 1 file changed, 45 insertions(+), 12 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Edward O'Callaghan: Looks good to me, approved diff --git a/layout.c b/layout.c index 9cd3e01..350e49e 100644 --- a/layout.c +++ b/layout.c @@ -114,42 +114,61 @@ } #endif -/* register an include argument (-i) for later processing */ -int register_include_arg(struct layout_include_args **args, const char *arg) +static bool parse_include_args(const char *arg, char **name, char **file) { - struct layout_include_args *tmp; char *colon; - char *name; - char *file = NULL; /* file is optional, so defaults to NULL */ + char *tmp_name; + char *tmp_file = NULL; /* file is optional, so defaults to NULL */ if (arg == NULL) { msg_gerr("<NULL> is a bad region name.\n"); - return 1; + return false; } /* -i <image>[:<file>] */ colon = strchr(arg, ':'); if (colon && !colon[1]) { msg_gerr("Missing filename parameter in %s\n", arg); - return 1; + return false; } if (colon) { - name = strndup(arg, colon - arg); - if (!name) { + tmp_name = strndup(arg, colon - arg); + if (!tmp_name) { msg_gerr("Out of memory"); goto error; } - file = strdup(colon + 1); - if (!file) { + tmp_file = strdup(colon + 1); + if (!tmp_file) { msg_gerr("Out of memory"); goto error; } } else { - name = strdup(arg); + tmp_name = strdup(arg); } + *name = tmp_name; + *file = tmp_file; + + return true; + +error: + free(tmp_name); + free(tmp_file); + return false; +} + +/* register an include argument (-i) for later processing */ +int register_include_arg(struct layout_include_args **args, const char *arg) +{ + struct layout_include_args *tmp; + char *name; + char *file; + + if (!parse_include_args(arg, &name, &file)) + return 1; + for (tmp = *args; tmp; tmp = tmp->next) { if (!strcmp(tmp->name, name)) { msg_gerr("Duplicate region name: \"%s\".\n", name); -- To view, visit https://review.coreboot.org/c/flashrom/+/70539 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iba2971846938fe95412f0a69ff3c069ee2d049b6 Gerrit-Change-Number: 70539 Gerrit-PatchSet: 3 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in flashrom[master]: tests/selfcheck.c: Fix on non-x86 machines
by Edward O'Callaghan (Code Review) 15 Dec '22

15 Dec '22

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/70554 ) Change subject: tests/selfcheck.c: Fix on non-x86 machines ...................................................................... tests/selfcheck.c: Fix on non-x86 machines The global const of `board_matches_size` has value `1` on non-x86 machines. Therefore strictly greater than zero is correct. Change-Id: Icbe677d3ef164e998daf898ddbea34f96246677f Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/70554 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Evan Benn <evanbenn(a)google.com> Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> --- M tests/selfcheck.c 1 file changed, 18 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Anastasia Klimchuk: Looks good to me, approved Evan Benn: Looks good to me, but someone else must approve diff --git a/tests/selfcheck.c b/tests/selfcheck.c index aeccf18..e235d8e 100644 --- a/tests/selfcheck.c +++ b/tests/selfcheck.c @@ -139,7 +139,7 @@ size_t i; - assert_true(board_matches_size > 1); + assert_true(board_matches_size > 0); assert_true(board_matches[board_matches_size - 1].vendor_name == NULL); for (i = 0; i < board_matches_size - 1; i++) { const struct board_match *b = &board_matches[i]; -- To view, visit https://review.coreboot.org/c/flashrom/+/70554 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Icbe677d3ef164e998daf898ddbea34f96246677f Gerrit-Change-Number: 70554 Gerrit-PatchSet: 5 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Evan Benn <evanbenn(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: merged

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[S] Change in flashrom[master]: stlinkv3_spi: Bug fix, Initialize uninitialized pointers
by Angel Pons (Code Review) 14 Dec '22

14 Dec '22

Angel Pons has abandoned this change. ( https://review.coreboot.org/c/flashrom/+/66225 ) Change subject: stlinkv3_spi: Bug fix, Initialize uninitialized pointers ...................................................................... Abandoned CB:67700 was submitted -- To view, visit https://review.coreboot.org/c/flashrom/+/66225 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I7ce156a9f7455434ea461560320c84660c93c02f Gerrit-Change-Number: 66225 Gerrit-PatchSet: 2 Gerrit-Owner: Shreeyash <shreeyash335(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Thomas Heijligen <src(a)posteo.de> Gerrit-MessageType: abandon

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[S] Change in flashrom[master]: flashchips.c: Add reg_bits for W25Q512NW-IM
by Kapil Porwal (Code Review) 14 Dec '22

14 Dec '22

Kapil Porwal has abandoned this change. ( https://review.coreboot.org/c/flashrom/+/70548 ) Change subject: flashchips.c: Add reg_bits for W25Q512NW-IM ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/flashrom/+/70548 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I97c24682bb0c8ea67ef5617567cd99f6526ba2da Gerrit-Change-Number: 70548 Gerrit-PatchSet: 2 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[S] Change in flashrom[master]: flashchips.c: Add reg_bits for W25Q512NW-IM
by Kapil Porwal (Code Review) 14 Dec '22

14 Dec '22

Attention is currently required from: Subrata Banik, Edward O'Callaghan, Nikolai Artemiev. Kapil Porwal has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/70548 ) Change subject: flashchips.c: Add reg_bits for W25Q512NW-IM ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > i have landed this https://review.coreboot.org/c/flashrom/+/67827/7/flashchips. […] Thanks, abandoning this one. -- To view, visit https://review.coreboot.org/c/flashrom/+/70548 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I97c24682bb0c8ea67ef5617567cd99f6526ba2da Gerrit-Change-Number: 70548 Gerrit-PatchSet: 2 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Wed, 14 Dec 2022 12:55:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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[S] Change in flashrom[master]: flashchips.c: Add reg_bits for W25Q512NW-IM
by Subrata Banik (Code Review) 14 Dec '22

14 Dec '22

Attention is currently required from: Kapil Porwal, Edward O'Callaghan, Nikolai Artemiev. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/70548 ) Change subject: flashchips.c: Add reg_bits for W25Q512NW-IM ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: i have landed this https://review.coreboot.org/c/flashrom/+/67827/7/flashchips.c -- To view, visit https://review.coreboot.org/c/flashrom/+/70548 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I97c24682bb0c8ea67ef5617567cd99f6526ba2da Gerrit-Change-Number: 70548 Gerrit-PatchSet: 2 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Wed, 14 Dec 2022 12:50:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in flashrom[master]: flashchips.c: Add reg_bits for W25Q512NW-IM
by Kapil Porwal (Code Review) 14 Dec '22

14 Dec '22

Kapil Porwal has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/70548 ) Change subject: flashchips.c: Add reg_bits for W25Q512NW-IM ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/flashrom/+/70548 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I97c24682bb0c8ea67ef5617567cd99f6526ba2da Gerrit-Change-Number: 70548 Gerrit-PatchSet: 2 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 14 Dec 2022 12:47:13 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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