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Change in flashrom[staging]: ich_descriptors: Fix off-by-one error
by David Hendricks (Code Review) 10 Aug '17

10 Aug '17

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/20937 Change subject: ich_descriptors: Fix off-by-one error ...................................................................... ich_descriptors: Fix off-by-one error The "number of masters" (NM) reflects the value that begins at 1. This value is compared with the constant MAX_NUM_MASTERS, which also begins with 1. So we really do want the raw value of NM to be used in the comparison. This fixes problems that arise when the actual NM value and MAX_NUM_MASTERS are equal. Also, the return value then gets used as an upper limit for for loops with counters beginning at 0. So adding 1 to the return value makes it even more wrong than it was before. Change-Id: I92627332265cf79720b98241d73bc36b1f6a7167 Signed-off-by: David Hendricks <dhendricks(a)fb.com> --- M ich_descriptors.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/37/20937/1 diff --git a/ich_descriptors.c b/ich_descriptors.c index a2f8edf..542e1ec 100644 --- a/ich_descriptors.c +++ b/ich_descriptors.c @@ -66,8 +66,8 @@ ssize_t ich_number_of_masters(const enum ich_chipset cs, const struct ich_desc_content *const cont) { - if (cont->NM < MAX_NUM_MASTERS) - return cont->NM + 1; + if (cont->NM <= MAX_NUM_MASTERS) + return cont->NM; else return -1; } -- To view, visit https://review.coreboot.org/20937 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: newchange Gerrit-Change-Id: I92627332265cf79720b98241d73bc36b1f6a7167 Gerrit-Change-Number: 20937 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com>

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Change in flashrom[staging]: ich_descriptors: Modify limits for C620/Lewisburg PCH
by David Hendricks (Code Review) 10 Aug '17

10 Aug '17

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/20936 Change subject: ich_descriptors: Modify limits for C620/Lewisburg PCH ...................................................................... ich_descriptors: Modify limits for C620/Lewisburg PCH Change-Id: Ic8adc4b87993e65096166fa6d665432697070b4c Signed-off-by: David Hendricks <dhendricks(a)fb.com> --- M ich_descriptors.h 1 file changed, 3 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/36/20936/1 diff --git a/ich_descriptors.h b/ich_descriptors.h index 8c313d1..574bc5f 100644 --- a/ich_descriptors.h +++ b/ich_descriptors.h @@ -165,7 +165,7 @@ }; }; -#define MAX_NUM_FLREGS 10 /* 16 on unsupported Lewisburg PCH */ +#define MAX_NUM_FLREGS 16 struct ich_desc_region { /* * Number of entries and width differ on various generations: @@ -174,6 +174,7 @@ * ICH8 .. Panther Point/7 5 13 * Lynx Point/8 .. Wildcat Point/9 7 15 * Sunrise Point/100 .. 10 15 + * Lewisburg/100 .. 16 15 */ union { uint32_t FLREGs[MAX_NUM_FLREGS]; /* Flash Descriptor Regions */ @@ -188,7 +189,7 @@ }; }; -#define MAX_NUM_MASTERS 5 /* 6 on unsupported Lewisburg PCH */ +#define MAX_NUM_MASTERS 6 /* 5 prior to C620/Lewisburg PCH */ struct ich_desc_master { union { uint32_t FLMSTRs[MAX_NUM_MASTERS]; /* Flash Masters */ -- To view, visit https://review.coreboot.org/20936 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: newchange Gerrit-Change-Id: Ic8adc4b87993e65096166fa6d665432697070b4c Gerrit-Change-Number: 20936 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com>

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Change in flashrom[staging]: chipset_enable: Mark Braswell as tested
by build bot (Jenkins) (Code Review) 09 Aug '17

09 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20923 ) Change subject: chipset_enable: Mark Braswell as tested ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/465/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/503/ : SUCCESS -- To view, visit https://review.coreboot.org/20923 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: Iaf7558af8737af36401f577ca7aba9fd7114a3df Gerrit-Change-Number: 20923 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 09 Aug 2017 17:14:00 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: chispet_enable: Add PCI IDs for C620-series PCHs
by build bot (Jenkins) (Code Review) 09 Aug '17

09 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20922 ) Change subject: chispet_enable: Add PCI IDs for C620-series PCHs ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/464/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/502/ : SUCCESS -- To view, visit https://review.coreboot.org/20922 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: I96c89bc28bdfcd953229c17679f2c28f8b874d0b Gerrit-Change-Number: 20922 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 09 Aug 2017 17:13:48 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: chipset_enable: Mark Braswell as tested
by Paul Menzel (Code Review) 09 Aug '17

09 Aug '17

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/20923 ) Change subject: chipset_enable: Mark Braswell as tested ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/20923 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: Iaf7558af8737af36401f577ca7aba9fd7114a3df Gerrit-Change-Number: 20923 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Comment-Date: Wed, 09 Aug 2017 06:57:54 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: chipset_enable: Mark Braswell as tested
by David Hendricks (Code Review) 09 Aug '17

09 Aug '17

David Hendricks has removed Stefan Tauner from this change. ( https://review.coreboot.org/20923 ) Change subject: chipset_enable: Mark Braswell as tested ...................................................................... Removed reviewer Stefan Tauner. -- To view, visit https://review.coreboot.org/20923 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: deleteReviewer Gerrit-Change-Id: Iaf7558af8737af36401f577ca7aba9fd7114a3df Gerrit-Change-Number: 20923 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com>

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Change in flashrom[staging]: chipset_enable: Mark Braswell as tested
by David Hendricks (Code Review) 09 Aug '17

09 Aug '17

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/20923 Change subject: chipset_enable: Mark Braswell as tested ...................................................................... chipset_enable: Mark Braswell as tested Reported by Uwe Vieweg: https://mail.coreboot.org/pipermail/flashrom/2017-August/015059.html Change-Id: Iaf7558af8737af36401f577ca7aba9fd7114a3df Signed-off-by: David Hendricks <david.hendricks(a)gmail.com> --- M chipset_enable.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/23/20923/1 diff --git a/chipset_enable.c b/chipset_enable.c index 20d2662..50fbdb0 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1735,7 +1735,7 @@ {0x8086, 0x1f39, NT, "Intel", "Avoton/Rangeley", enable_flash_silvermont}, {0x8086, 0x1f3a, NT, "Intel", "Avoton/Rangeley", enable_flash_silvermont}, {0x8086, 0x1f3b, NT, "Intel", "Avoton/Rangeley", enable_flash_silvermont}, - {0x8086, 0x229c, NT, "Intel", "Braswell", enable_flash_silvermont}, + {0x8086, 0x229c, OK, "Intel", "Braswell", enable_flash_silvermont}, {0x8086, 0x2310, NT, "Intel", "DH89xxCC (Cave Creek)", enable_flash_pch7}, {0x8086, 0x2390, NT, "Intel", "Coleto Creek", enable_flash_pch7}, {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich0}, -- To view, visit https://review.coreboot.org/20923 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: newchange Gerrit-Change-Id: Iaf7558af8737af36401f577ca7aba9fd7114a3df Gerrit-Change-Number: 20923 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com>

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Change in flashrom[staging]: chispet_enable: Add PCI IDs for C620-series PCHs
by David Hendricks (Code Review) 09 Aug '17

09 Aug '17

David Hendricks has posted comments on this change. ( https://review.coreboot.org/20922 ) Change subject: chispet_enable: Add PCI IDs for C620-series PCHs ...................................................................... Patch Set 1: Datasheet: https://www.intel.com/content/www/us/en/chipsets/c620-series-chipset-datash… (table 2-1) -- To view, visit https://review.coreboot.org/20922 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: I96c89bc28bdfcd953229c17679f2c28f8b874d0b Gerrit-Change-Number: 20922 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Comment-Date: Wed, 09 Aug 2017 04:01:32 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: chispet_enable: Add PCI IDs for C620-series PCHs
by David Hendricks (Code Review) 09 Aug '17

09 Aug '17

David Hendricks has uploaded this change for review. ( https://review.coreboot.org/20922 Change subject: chispet_enable: Add PCI IDs for C620-series PCHs ...................................................................... chispet_enable: Add PCI IDs for C620-series PCHs Marked as untested for now. Change-Id: I96c89bc28bdfcd953229c17679f2c28f8b874d0b Signed-off-by: David Hendricks <dhendricks(a)fb.com> --- M chipset_enable.c 1 file changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/22/20922/1 diff --git a/chipset_enable.c b/chipset_enable.c index 20d2662..a7ad97f 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1910,6 +1910,18 @@ {0x8086, 0xa153, NT, "Intel", "QM175", enable_flash_pch100}, {0x8086, 0xa154, NT, "Intel", "CM238", enable_flash_pch100}, {0x8086, 0xa155, NT, "Intel", "QMU185", enable_flash_pch100}, + {0x8086, 0xa1c1, NT, "Intel", "C621 Series Chipset (QS/PRQ)", enable_flash_pch100}, + {0x8086, 0xa1c2, NT, "Intel", "C622 Series Chipset (QS/PRQ)", enable_flash_pch100}, + {0x8086, 0xa1c3, NT, "Intel", "C624 Series Chipset (QS/PRQ)", enable_flash_pch100}, + {0x8086, 0xa1c4, NT, "Intel", "C625 Series Chipset (QS/PRQ)", enable_flash_pch100}, + {0x8086, 0xa1c5, NT, "Intel", "C626 Series Chipset (QS/PRQ)", enable_flash_pch100}, + {0x8086, 0xa1c6, NT, "Intel", "C627 Series Chipset (QS/PRQ)", enable_flash_pch100}, + {0x8086, 0xa1c7, NT, "Intel", "C628 Series Chipset (QS/PRQ)", enable_flash_pch100}, + {0x8086, 0xa242, NT, "Intel", "C624 Series Chipset Supersku", enable_flash_pch100}, + {0x8086, 0xa243, NT, "Intel", "C627 Series Chipset Supersku", enable_flash_pch100}, + {0x8086, 0xa244, NT, "Intel", "C621 Series Chipset Supersku", enable_flash_pch100}, + {0x8086, 0xa245, NT, "Intel", "C627 Series Chipset Supersku", enable_flash_pch100}, + {0x8086, 0xa246, NT, "Intel", "C628 Series Chipset Supersku", enable_flash_pch100}, #endif {0}, }; -- To view, visit https://review.coreboot.org/20922 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: newchange Gerrit-Change-Id: I96c89bc28bdfcd953229c17679f2c28f8b874d0b Gerrit-Change-Number: 20922 Gerrit-PatchSet: 1 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com>

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Change in flashrom[staging]: rpci: Use pci_dev struct pointer to avoid API breaks
by Youness Alaoui (Code Review) 08 Aug '17

08 Aug '17

Youness Alaoui has posted comments on this change. ( https://review.coreboot.org/20784 ) Change subject: rpci: Use pci_dev struct pointer to avoid API breaks ...................................................................... Patch Set 4: > Sorry for stalling. Now, the discussed `pacc` acrobatic in > chipset_enable.c should be added here. It's done, I wasn't sure if I needed any more details in the comment for why the acrobatic had to be done, but I think it's fine as is. -- To view, visit https://review.coreboot.org/20784 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: Icde2e587992ba964d4ff92c33aa659850ba06298 Gerrit-Change-Number: 20784 Gerrit-PatchSet: 4 Gerrit-Owner: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 08 Aug 2017 17:14:54 +0000 Gerrit-HasComments: No

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