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Change subject: libflashrom: Allow getting the progress_state from the flashctx
......................................................................
Patch Set 5:
(1 comment)
File include/libflashrom.h:
https://review.coreboot.org/c/flashrom/+/64663/comment/a9829e26_9bbb11df?us… :
PS5, Line 108: struct flashrom_progress *flashrom_get_progress_state(struct flashrom_flashctx *flashctx);
I wonder if this should be a `const struct flashrom_progress*` to indicate that we don't expect the caller to modify the progress information? It wouldn't be harmful if they did (at least with the current implementation), but I think it would be better to exclude mutability completely.
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Change subject: doc: Add few sections to recent development doc
......................................................................
doc: Add few sections to recent development doc
Change-Id: Iedaca4a704c57c1db399c7888f743ad2961cbf9d
Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/84954
Reviewed-by: Peter Marheine <pmarheine(a)chromium.org>
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---
M doc/release_notes/devel.rst
1 file changed, 78 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Peter Marheine: Looks good to me, approved
diff --git a/doc/release_notes/devel.rst b/doc/release_notes/devel.rst
index 02b4e24..7b21a99 100644
--- a/doc/release_notes/devel.rst
+++ b/doc/release_notes/devel.rst
@@ -77,6 +77,75 @@
It currently uses automatic feature detection through the corresponding
sfdp page.
+Programmer updates
+===================
+
+* ch347_spi: Add spi clock frequency selection ("spispeed" option)
+* dummyflasher: Enable higher frequency emulation, add docs and tests
+* ichspi: Change the opcode position for reprogramming on the fly 2->4
+* ichspi: Merge spi_master implementations for Intel ich
+
+Bugs fixed
+==========
+
+* Modified bytes would sometimes not be verified after writing
+
+ In some situations an off-by-one error would cause the last byte
+ of memory that was modified by an operation to not be verified.
+ This could prevent some erase or write errors from being detected,
+ or in other cases could make verification appear false-negative.
+
+ Fixed by https://review.coreboot.org/c/flashrom/+/84078.
+
+* Possible crashes while preparing erase operations
+
+ An out-of-bounds memory read was found in the algorithm that selects methods
+ to erase memory, which could cause flashrom to crash. This issue was first
+ introduced in release 1.4, and crashes were observed when running on OpenBSD.
+
+ See https://ticket.coreboot.org/issues/555, and fixed by
+ https://review.coreboot.org/c/flashrom/+/84234.
+
+* Crash when attempting to erase FEATURE_NO_ERASE chips
+
+ When attempting to erase a chip that doesn't need to be erased before
+ being written, flashrom could attempt to read through a null pointer
+ and crash. The only supported chip that is affected is the M95M02
+ EEPROM.
+
+ See https://ticket.coreboot.org/issues/553, and fixed by
+ https://review.coreboot.org/c/flashrom/+/84203.
+
+* install failures related to libcmocka
+
+ In some configurations, the install target provided by the buildsystem (like
+ meson install) would fail to execute successfully due to a missing libcmocka
+ file. This is fixed by not installing libcmocka, because it is a third-party
+ library used by flashrom only for testing.
+
+ See https://ticket.coreboot.org/issues/561, and fixed by
+ https://review.coreboot.org/c/flashrom/+/84557.
+
+* Excess erase of automatically-probed chips on Intel chipsets
+
+ When erasing some chips using the ichspi programmer (for Intel ICH chipsets),
+ the entire chip would be erased and rewritten even when the hardware supported
+ erasing smaller blocks, causing operations to take longer to complete and
+ negatively impacting chip longevity. This issue was first introduced in version
+ 1.4.
+
+ See https://ticket.coreboot.org/issues/556, and fixed by
+ https://review.coreboot.org/c/flashrom/+/84253.
+
+* Unnecessary erases
+
+ When erasing parts of a memory, some blocks could be erased and rewritten
+ unnecessarily or erased multiple times which could hurt the longevity of
+ the memory chip. This behavior was introduced in version 1.4.
+
+ Fixed by https://review.coreboot.org/c/flashrom/+/84614 and
+ https://review.coreboot.org/c/flashrom/+/84686.
+
Chipset support
===============
@@ -124,3 +193,12 @@
* XM25QU256D
* XM25QU512C
* XM25QU512D
+
+Misc
+=========
+
+* reduce DELAY_MINIMUM_SLEEP_US to 100 by default
+* tests: Add assert for eraseblocks order of invocations for write op
+* VERSION: Change name pattern to match tag name from now on
+* writeprotect: Fix inaccurate return code
+* erasure_layout: Fix unreachable error message
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Change subject: doc: Add few sections to recent development doc
......................................................................
Patch Set 3: Code-Review+2
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Change subject: build script: Add rpmc option to always be enabled on Jenkins
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Patch Set 1: Code-Review+2
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Change subject: Rename cli_classic.h to a more adequate cli_getop.h
......................................................................
Patch Set 3:
(2 comments)
Patchset:
PS3:
All done now! :)
File cli_getopt.c:
https://review.coreboot.org/c/flashrom/+/85072/comment/3443bfd8_766de37c?us… :
PS2, Line 35: #include <flash.h>
> Let's keep this line as it was […]
Acknowledged
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Hello Anastasia Klimchuk, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/85072?usp=email
to look at the new patch set (#3).
The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: Rename cli_classic.h to a more adequate cli_getop.h
......................................................................
Rename cli_classic.h to a more adequate cli_getop.h
The header only defines getop related stuff so it seems more intuitive
this way.
Change-Id: Iaceeabedc26e93147d8122376d88e730aad1e355
Signed-off-by: Antonio Vázquez Blanco <antoniovazquezblanco(a)gmail.com>
---
M cli_classic.c
M cli_getopt.c
R include/cli_getopt.h
3 files changed, 11 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/72/85072/3
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Change subject: flashchips: Skip "WP untested" message for SFDP-capable chip
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
Since the feature is not supported currently, I am wondering if maybe a test_state of NA (Not applicable) for the write protect feature is more representative of what we want it to mean.
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Change subject: sfdp: Update the message shown when SFDP-capable chip is detected
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Change subject: Rename cli_classic.h to a more adequate cli_getop.h
......................................................................
Patch Set 2:
(2 comments)
File cli_getopt.c:
https://review.coreboot.org/c/flashrom/+/85072/comment/19c1e84f_e07deba2?us… :
PS1, Line 28: #include "cli_getopt.h"
> Sorry, this is even subconscious for me. I do this because cli_getopt. […]
Thank you for explanation! This is useful for me.
Agree to keep cli_getop.h line as you did.
I mark this one resolved, I added one last comment below.
File cli_getopt.c:
https://review.coreboot.org/c/flashrom/+/85072/comment/9cd78fad_566b69c7?us… :
PS2, Line 35: #include <flash.h>
Let's keep this line as it was
> #include "flash.h"
Since this include is not related to the goal of the patch, let's not change this line.
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