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Change in flashrom[master]: [RFC][OTP] flashchips: add support for OTP to several chip models
by Sergii Dmytruk (Code Review) 13 Jan '22

13 Jan '22

Attention is currently required from: Nico Huber, Angel Pons, Sergii Dmytruk. Hello build bot (Jenkins), Nico Huber, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/59405 to look at the new patch set (#20). Change subject: [RFC][OTP] flashchips: add support for OTP to several chip models ...................................................................... [RFC][OTP] flashchips: add support for OTP to several chip models List of the chips: * Eon EN25Q16 * Eon EN25Q32(A/B) * Eon EN25Q40 * Eon EN25Q64 * Eon EN25Q80(A) * Eon EN25QH128 * Eon EN25QH16 * Eon EN25QH32 * Eon EN25QH64 * GigaDevice GD25Q127C/GD25Q128C * GigaDevice GD25VQ21B * GigaDevice GD25VQ41B * Winbond W25Q40.V * Winbond W25Q128.V Change-Id: I98491ed00d1e5fa6682bcdc4d5e132ec76447f21 Signed-off-by: Hatim Kanchwala <hatim at hatimak.me> Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> --- M Makefile M flashchips.c M meson.build M otp.h A otp_layouts.c 5 files changed, 230 insertions(+), 29 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/05/59405/20 -- To view, visit https://review.coreboot.org/c/flashrom/+/59405 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I98491ed00d1e5fa6682bcdc4d5e132ec76447f21 Gerrit-Change-Number: 59405 Gerrit-PatchSet: 20 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: [RFC][OTP] spi25_statusreg: support reading/writing security register
by Sergii Dmytruk (Code Review) 13 Jan '22

13 Jan '22

Attention is currently required from: Nico Huber, Angel Pons, Sergii Dmytruk. Hello build bot (Jenkins), Nico Huber, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/59709 to look at the new patch set (#16). Change subject: [RFC][OTP] spi25_statusreg: support reading/writing security register ...................................................................... [RFC][OTP] spi25_statusreg: support reading/writing security register Not to be confused with "secure registers" of OTP. Security register is a dedicated status register for security-related bits. You don't write its value directly, issuing corresponding write command with no data just sets OTP bit to 1 automatically. No WREN is necessary, but at least some datasheets indicate BUSY state after write command. Unlike cases where OTP bit is part of SR and can only be written while in OTP mode, security register can only be written outside of the mode. Change-Id: Iae1753ca4cb051127a5bcbeba7f064053adb8dae Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> --- M flash.h M spi.h M spi25_statusreg.c 3 files changed, 53 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/09/59709/16 -- To view, visit https://review.coreboot.org/c/flashrom/+/59709 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iae1753ca4cb051127a5bcbeba7f064053adb8dae Gerrit-Change-Number: 59709 Gerrit-PatchSet: 16 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: dummyflasher: add SR2 and SR3 emulation harness
by Sergii Dmytruk (Code Review) 13 Jan '22

13 Jan '22

Attention is currently required from: Nico Huber, Angel Pons, Nikolai Artemiev. Hello build bot (Jenkins), Nico Huber, Angel Pons, Anastasia Klimchuk, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/59072 to look at the new patch set (#23). Change subject: dummyflasher: add SR2 and SR3 emulation harness ...................................................................... dummyflasher: add SR2 and SR3 emulation harness Prepare everything for emulating SR2 and SR3 for chips that have it. This is needed for accessing SRP1 and WPS bits which are involved in write protection. The emulated register doesn't affect anything yet and will be tested by write-protection tests. Change-Id: I177ae3f068f03380f5b3941d9996a07205672e59 Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> --- M dummyflasher.c M flashrom.8.tmpl 2 files changed, 109 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/72/59072/23 -- To view, visit https://review.coreboot.org/c/flashrom/+/59072 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I177ae3f068f03380f5b3941d9996a07205672e59 Gerrit-Change-Number: 59072 Gerrit-PatchSet: 23 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-CC: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: spi25_statusreg: inline spi_write_register_flag()
by Sergii Dmytruk (Code Review) 13 Jan '22

13 Jan '22

Attention is currently required from: Nico Huber, Edward O'Callaghan, Angel Pons, Nikolai Artemiev. Sergii Dmytruk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59528 ) Change subject: spi25_statusreg: inline spi_write_register_flag() ...................................................................... Patch Set 21: (1 comment) File spi25_statusreg.c: https://review.coreboot.org/c/flashrom/+/59528/comment/8a816b03_f054947d PS21, Line 110: /* WRSR performs a self-timed erase before the changes take effect. : * This may take 50-85 ms in most cases, and some chips apparently : * allow running RDSR only once. Therefore pick an initial delay of : * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed. : */ : int i = 0; : programmer_delay(100 * 1000); : while (spi_read_status_register(flash) & SPI_SR_WIP) { : if (++i > 490) { : msg_cerr("Error: WIP bit after WRSR never cleared\n"); : return TIMEOUT_ERROR; : } : programmer_delay(10 * 1000); : } : return 0; This undoes changes to the waiting loop recently made in CB:58475. -- To view, visit https://review.coreboot.org/c/flashrom/+/59528 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I4996b0848d0ed09032bad2ab13ab1f40bbfc0304 Gerrit-Change-Number: 59528 Gerrit-PatchSet: 21 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Wed, 12 Jan 2022 18:27:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in flashrom[master]: Makefile: merge compiler, hwlibs, features targets into config target
by Thomas Heijligen (Code Review) 13 Jan '22

13 Jan '22

Attention is currently required from: Nico Huber. Hello build bot (Jenkins), Nico Huber, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/60107 to look at the new patch set (#10). Change subject: Makefile: merge compiler, hwlibs, features targets into config target ...................................................................... Makefile: merge compiler, hwlibs, features targets into config target These targets are all called together. No need to have them individual. Change-Id: Ic76f923bca2beb6f95b8ea0cced4569b07e9b9ba Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.com> --- M Makefile 1 file changed, 12 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/07/60107/10 -- To view, visit https://review.coreboot.org/c/flashrom/+/60107 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ic76f923bca2beb6f95b8ea0cced4569b07e9b9ba Gerrit-Change-Number: 60107 Gerrit-PatchSet: 10 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: Makefile: reorder make targets
by Thomas Heijligen (Code Review) 13 Jan '22

13 Jan '22

Attention is currently required from: Nico Huber. Hello build bot (Jenkins), Nico Huber, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/60836 to look at the new patch set (#3). Change subject: Makefile: reorder make targets ...................................................................... Makefile: reorder make targets Use the order in which the targets get executed. Change-Id: Ic45c2fc98c679ac7be4ee2860d72b517b8b67a17 Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.com> --- M Makefile 1 file changed, 36 insertions(+), 35 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/36/60836/3 -- To view, visit https://review.coreboot.org/c/flashrom/+/60836 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ic45c2fc98c679ac7be4ee2860d72b517b8b67a17 Gerrit-Change-Number: 60836 Gerrit-PatchSet: 3 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: [RFC][WIP] Makefile: use directory for object files
by Thomas Heijligen (Code Review) 12 Jan '22

12 Jan '22

Thomas Heijligen has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/61034 ) Change subject: [RFC][WIP] Makefile: use directory for object files ...................................................................... [RFC][WIP] Makefile: use directory for object files Use $(OBJPATH), defaults to .obj, as storage location for object and dependency files. This keeps the main source directory clean. The Makefile in util/ich_descriptors_tool does this already. Change-Id: Id0b5eea0b4c941f5af37c0d27dcc95c0bb45461f Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.com> --- M Makefile 1 file changed, 9 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/34/61034/1 diff --git a/Makefile b/Makefile index b8287a9..47efebc 100644 --- a/Makefile +++ b/Makefile @@ -36,6 +36,7 @@ RANLIB ?= ranlib PKG_CONFIG ?= pkg-config BUILD_DETAILS_FILE ?= build_details.txt +OBJPATH = .obj # The following parameter changes the default programmer that will be used if there is no -p/--programmer # argument given when running flashrom. The predefined setting does not enable any default so that every @@ -906,8 +907,8 @@ @+$(MAKE) -C util/ich_descriptors_tool/ HOST_OS=$(HOST_OS) TARGET_OS=$(TARGET_OS) endif -$(PROGRAM)$(EXEC_SUFFIX): $(OBJS) - $(CC) -o $(PROGRAM)$(EXEC_SUFFIX) $(OBJS) $(LDFLAGS) $(LIBS) $(PCILIBS) $(FEATURE_LIBS) +$(PROGRAM)$(EXEC_SUFFIX): $(addprefix $(OBJPATH)/,$(OBJS)) + $(CC) -o $(PROGRAM)$(EXEC_SUFFIX) $^ $(LDFLAGS) $(LIBS) $(PCILIBS) $(FEATURE_LIBS) libflashrom.a: $(LIBFLASHROM_OBJS) $(AR) rcs $@ $^ @@ -918,14 +919,17 @@ # stored files, they can be handled here as well. TAROPTIONS = $(shell LC_ALL=C tar --version|grep -q GNU && echo "--owner=root --group=root") -%.o: %.c features +_create_OBJPATH: + mkdir -p $(OBJPATH) + +$(OBJPATH)/%.o: %.c features _create_OBJPATH $(CC) -MMD $(CFLAGS) $(CPPFLAGS) $(FLASHROM_CFLAGS) $(FEATURE_CFLAGS) $(SCMDEF) -o $@ -c $< # Make sure to add all names of generated binaries here. # This includes all frontends and libflashrom. # We don't use EXEC_SUFFIX here because we want to clean everything. clean: - rm -f $(PROGRAM) $(PROGRAM).exe libflashrom.a $(filter-out Makefile.d, $(wildcard *.d *.o)) $(PROGRAM).8 $(PROGRAM).8.html $(BUILD_DETAILS_FILE) + rm -rf $(PROGRAM) $(PROGRAM).exe libflashrom.a $(PROGRAM).8 $(PROGRAM).8.html $(BUILD_DETAILS_FILE) $(OBJPATH) @+$(MAKE) -C util/ich_descriptors_tool/ clean distclean: clean @@ -1086,4 +1090,4 @@ # Disable implicit suffixes and built-in rules (for performance and profit) .SUFFIXES: --include $(OBJS:.o=.d) +-include $(OBJPATH)/$(OBJS:.o=.d) -- To view, visit https://review.coreboot.org/c/flashrom/+/61034 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id0b5eea0b4c941f5af37c0d27dcc95c0bb45461f Gerrit-Change-Number: 61034 Gerrit-PatchSet: 1 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-MessageType: newchange

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Change in flashrom[master]: flashchips: add writeprotect bit layout map to chips
by Nikolai Artemiev (Code Review) 12 Jan '22

12 Jan '22

Attention is currently required from: Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk, Sergii Dmytruk. Nikolai Artemiev has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58477 ) Change subject: flashchips: add writeprotect bit layout map to chips ...................................................................... Patch Set 24: (1 comment) File flashchips.c: https://review.coreboot.org/c/flashrom/+/58477/comment/0b7c85ac_3998f79e PS20, Line 6353: .tb = {STATUS1, 5, RW}, /* Called BP3 in datasheet, acts like TB */ : .sec = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */ > Hmmm, this can indeed be a problem. I haven't had time to check datasheets yet. Any thoughts about how this should be handled? The main issue in my experience is that someone may add support for a new chip using bit names from the datasheet without realizing that the naming is suboptimal, e.g. they might call a bit BP3 when it acts like TB. That leads to unnecessary duplication of range decoding functions that only differ in bit naming. It happened a lot in cros WP code and caused unnecessary range lookup tables to be added. It might be sufficient to add a comment warning people to check the function of each bit, rather than directly using the datasheet names. We could also add some kind of test for it maybe. E.g. for every range decoding function, check that none of the BP bits act like TB/CMP/SEC. It would be easy to detect if a bit acts like TB or CMP, but SEC would be harder and I'm not sure if would be worth it overall. Another option is to always use the datasheet's names, and avoid duplication by factoring out common logic from the range decoding functions. But that still leaves a few problems, e.g. names can change between datasheet revisions or between datasheets for different chips that share a single chip definition. -- To view, visit https://review.coreboot.org/c/flashrom/+/58477 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id08d77e6d4ca5109c0d698271146d026dbc21284 Gerrit-Change-Number: 58477 Gerrit-PatchSet: 24 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Wed, 12 Jan 2022 07:28:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-MessageType: comment

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Change in flashrom[master]: linux_mtd: check ioctl() return value properly
by Nikolai Artemiev (Code Review) 12 Jan '22

12 Jan '22

Nikolai Artemiev has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/60996 ) Change subject: linux_mtd: check ioctl() return value properly ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/flashrom/+/60996/comment/ea784251_0af74915 PS1, Line 12: none > keep the bugs though b:213561594,b:210973586,b:182223106 Done -- To view, visit https://review.coreboot.org/c/flashrom/+/60996 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I40cfbdee2ab608fbe6c17d9cac6ec53ff224d9a4 Gerrit-Change-Number: 60996 Gerrit-PatchSet: 2 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Wed, 12 Jan 2022 04:55:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: comment

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Change in flashrom[master]: linux_mtd: check ioctl() return value properly
by Nikolai Artemiev (Code Review) 12 Jan '22

12 Jan '22

Attention is currently required from: Nikolai Artemiev. Hello build bot (Jenkins), Edward O'Callaghan, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/60996 to look at the new patch set (#2). Change subject: linux_mtd: check ioctl() return value properly ...................................................................... linux_mtd: check ioctl() return value properly Make the linux_mtd driver treat any negative return value from the MEMERASE ioctl as an error. Previously it only treated -1 as an error. BUG=b:213561594,b:210973586,b:182223106 BRANCH=none TEST=builds Change-Id: I40cfbdee2ab608fbe6c17d9cac6ec53ff224d9a4 Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> --- M linux_mtd.c 1 file changed, 5 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/96/60996/2 -- To view, visit https://review.coreboot.org/c/flashrom/+/60996 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I40cfbdee2ab608fbe6c17d9cac6ec53ff224d9a4 Gerrit-Change-Number: 60996 Gerrit-PatchSet: 2 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-MessageType: newpatchset

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