Nico Huber has submitted this change. ( https://review.coreboot.org/c/flashrom/+/60055 )
Change subject: SFDP: make mandatory table length check work with newer SFDP revisions
......................................................................
SFDP: make mandatory table length check work with newer SFDP revisions
The JEDEC SFDP specification JESD216A (1.5) adds five new DWORDs to the
Basic Flash Parameter Table. Later versions of the spec add even more
fields. This increases the table being read from 36 bytes to currently
64 bytes and makes flashrom bail out for any SFDP version >= 1.5 due to
a static table length check.
This was discovered on a GigaDevice GD25B127DSIGR from 2021 with SFDP
revision 1.6, while another flash of the same model from 2020 with SFDP
revision 1.0 was detected fine by flashrom.
GD25B127DSIGR - 2020 version:
Probing for Unknown SFDP-capable chip, 0 kB: SFDP revision = 1.0
SFDP number of parameter headers is 2 (NPH = 1).
SFDP parameter table header 0/1:
ID 0x00, version 1.0
Length 36 B, Parameter Table Pointer 0x000030
GD25B127DSIGR - 2021 version:
Probing for Unknown SFDP-capable chip, 0 kB: SFDP revision = 1.6
SFDP number of parameter headers is 2 (NPH = 1).
SFDP parameter table header 0/1:
ID 0x00, version 1.6
Length 64 B, Parameter Table Pointer 0x000030
...
Length of the mandatory JEDEC SFDP parameter table is wrong (64 B),
skipping it.
The specification says that changes of the minor SFDP revision will
maintain compatibility. Thus, simply check for the minimal required
table length, which is 16 bytes for legacy Intel pre-SFDP and 36 bytes
for SFDP.
Change-Id: Id84cde4ebc805d68e2984e8041fbc48d7ceebe34
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60055
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Nico Huber <nico.h(a)gmx.de>
---
M sfdp.c
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Nico Huber: Looks good to me, approved
diff --git a/sfdp.c b/sfdp.c
index 85e698d..b549417 100644
--- a/sfdp.c
+++ b/sfdp.c
@@ -369,7 +369,7 @@
msg_cdbg("The chip contains an unknown "
"version of the JEDEC flash "
"parameters table, skipping it.\n");
- } else if (len != 9 * 4 && len != 4 * 4) {
+ } else if (len != 4 * 4 && len < 9 * 4) {
msg_cdbg("Length of the mandatory JEDEC SFDP "
"parameter table is wrong (%d B), "
"skipping it.\n", len);
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/61288 )
Change subject: Add mediatek_i2c_spi interface
......................................................................
Patch Set 2:
(2 comments)
Patchset:
PS1:
> - We had two different board designs, one of which connects the TSUM* to SMBus and the other to raw I2C. This driver is tested on both. The finished product will be using I2C. I've left the SMBus code in as a convenience so we can continue to flash our earlier prototypes.
Ah, hmmm, I'm not sure but I think there are SMBus controller drivers that could
still advertise I2C_FUNC_I2C. Can you please confirm that this is not the case.
Or can you tell us what controller is used specifically?
Also, is the chip aware if it is connected over SMBus or I2C, e.g. by a pin strap?
> - GPIO numbers are specific to TSUMOP82JUQ. My understanding is that these particular GPIO lines, for that chip, are standard for connecting to SPI WP#. Documentation that we received from PanVision just says to poke them and doesn't provide further detail.
Who is PanVision in this story? Did they acquire the MSTAR chip line and provide
the chips? or do they provide the board? or ...?
Also, where do you use these chips, integrated display or something external?
If you used SMBus, is it even on the mainboard?
File mediatek_i2c_spi.c:
https://review.coreboot.org/c/flashrom/+/61288/comment/e2d50ac8_de21b96a
PS1, Line 96: args.data->block
> I imagine Edward would like to avoid pointer arithmetics, substituting `args. […]
I would use `args.data->block + 1` when targeting an array and
`&args.data->block[1]` only if I target a single member.
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/61362 )
Change subject: ich_descriptors.c Invert the meaning of 'dual_output' bit
......................................................................
Patch Set 2: Code-Review+2
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Change subject: Add mediatek_i2c_spi interface
......................................................................
Patch Set 2:
(3 comments)
File mediatek_i2c_spi.c:
https://review.coreboot.org/c/flashrom/+/61288/comment/4c5d2b8f_a59c3ac9
PS1, Line 96: args.data->block
> This is copying the data out of the i2c_smbus_data, starting at 1, using the size specified by [0].
I imagine Edward would like to avoid pointer arithmetics, substituting `args.data->block + 1` with `&args.data->block[1]`.
https://review.coreboot.org/c/flashrom/+/61288/comment/1c39616f_6a30553b
PS1, Line 242: GPIO line
> This is specific to the revision of chip that our board uses (TSUMOP82JUQ).
At the very least, I'd add an option to enable WP# control.
https://review.coreboot.org/c/flashrom/+/61288/comment/6b711c64_fa9c87a6
PS1, Line 249: 0x426, 7
> The TSUMOP82JUQ has a GPIO line going to WP# on SPI, and these two registers (0x426 and 0x428) contr […]
Hmmm, I see. Could other boards with the same chip use a different GPIO for WP#?
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/60055 )
Change subject: SFDP: make mandatory table length check work with newer SFDP revisions
......................................................................
Patch Set 3: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/flashrom/+/60055/comment/f63efb39_ce86e559
PS1, Line 28: ***RFC*** We could maintain a list of revisions/lengths but is it really
: worth it?
:
> Ack. […]
Ack
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/61379 )
Change subject: sfdp: drop redundant check of the mandatory table size
......................................................................
Patch Set 1: Code-Review+2
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Change subject: sfdp: drop redundant check of the mandatory table size
......................................................................
Patch Set 1:
This change is ready for review.
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Change subject: SFDP: make mandatory table length check work with newer SFDP revisions
......................................................................
Patch Set 3:
(5 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/60055/comment/7ad73dbb_cf729508
PS1, Line 28: ***RFC*** We could maintain a list of revisions/lengths but is it really
: worth it?
:
> > > and that the major version is 1. […]
Ack. I chose the first version
Commit Message:
https://review.coreboot.org/c/flashrom/+/60055/comment/67815070_fd202944
PS2, Line 9: JESD216F (1.6) released in September 2021
: adds three new DWORDs
> JESD216A r1.5: adds 5 new DWORDs. ... later revisions add even more... so any chip with SFDP >= r1. […]
Done
https://review.coreboot.org/c/flashrom/+/60055/comment/04321ddb_c0bdb87c
PS2, Line 11: 32
> 9*4=36.
Done
https://review.coreboot.org/c/flashrom/+/60055/comment/b4732efb_32ea6491
PS2, Line 24:
> let's add the output here […]
Done
File sfdp.c:
https://review.coreboot.org/c/flashrom/+/60055/comment/6befb33f_15ffff6e
PS2, Line 372: } else if (sfdp_fill_flash(flash->chip, tbuf, len) == 0)
> yes
redundancy dropped in CB:61379
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Hello Edward O'Callaghan, Felix Singer, build bot (Jenkins), Nico Huber, Angel Pons, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/60055
to look at the new patch set (#3).
Change subject: SFDP: make mandatory table length check work with newer SFDP revisions
......................................................................
SFDP: make mandatory table length check work with newer SFDP revisions
The JEDEC SFDP specification JESD216A (1.5) adds five new DWORDs to the
Basic Flash Parameter Table. Later versions of the spec add even more
fields. This increases the table being read from 36 bytes to currently
64 bytes and makes flashrom bail out for any SFDP version >= 1.5 due to
a static table length check.
This was discovered on a GigaDevice GD25B127DSIGR from 2021 with SFDP
revision 1.6, while another flash of the same model from 2020 with SFDP
revision 1.0 was detected fine by flashrom.
GD25B127DSIGR - 2020 version:
Probing for Unknown SFDP-capable chip, 0 kB: SFDP revision = 1.0
SFDP number of parameter headers is 2 (NPH = 1).
SFDP parameter table header 0/1:
ID 0x00, version 1.0
Length 36 B, Parameter Table Pointer 0x000030
GD25B127DSIGR - 2021 version:
Probing for Unknown SFDP-capable chip, 0 kB: SFDP revision = 1.6
SFDP number of parameter headers is 2 (NPH = 1).
SFDP parameter table header 0/1:
ID 0x00, version 1.6
Length 64 B, Parameter Table Pointer 0x000030
...
Length of the mandatory JEDEC SFDP parameter table is wrong (64 B),
skipping it.
The specification says that changes of the minor SFDP revision will
maintain compatibility. Thus, simply check for the minimal required
table length, which is 16 bytes for legacy Intel pre-SFDP and 36 bytes
for SFDP.
Change-Id: Id84cde4ebc805d68e2984e8041fbc48d7ceebe34
Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de>
---
M sfdp.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/55/60055/3
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