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Change in flashrom[master]: libflashrom,writeprotect: add flashrom_wp_get_available_ranges()
by Nikolai Artemiev (Code Review) 22 Feb '22

22 Feb '22

Attention is currently required from: Nico Huber, Angel Pons, Nikolai Artemiev, Sergii Dmytruk. Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk, Sergii Dmytruk, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/58481 to look at the new patch set (#45). Change subject: libflashrom,writeprotect: add flashrom_wp_get_available_ranges() ...................................................................... libflashrom,writeprotect: add flashrom_wp_get_available_ranges() Generate list of available ranges by enumerating all possible values that range bits (BPx, TB, ...) can take and using the chip's range decoding function to get the range that is selected by each one. BUG=b:195381327,b:153800563 TEST=flashrom --wp-list BRANCH=none Change-Id: Id51f038f03305c8536d80313e52f77d27835f34d Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> --- M libflashrom.c M libflashrom.h M writeprotect.c M writeprotect.h 4 files changed, 279 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/81/58481/45 -- To view, visit https://review.coreboot.org/c/flashrom/+/58481 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id51f038f03305c8536d80313e52f77d27835f34d Gerrit-Change-Number: 58481 Gerrit-PatchSet: 45 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: writeprotect: add set_wp_range()
by Nikolai Artemiev (Code Review) 22 Feb '22

22 Feb '22

Attention is currently required from: Edward O'Callaghan, Angel Pons, Nikolai Artemiev, Sergii Dmytruk. Hello build bot (Jenkins), Nico Huber, Paul Menzel, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk, Sergii Dmytruk, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/58482 to look at the new patch set (#47). Change subject: writeprotect: add set_wp_range() ...................................................................... writeprotect: add set_wp_range() BUG=b:195381327,b:153800563 TEST=flashrom --wp-{status,range} BRANCH=none Change-Id: I7d26f43fb05c5828b9839bb57a28fa1088dcd9a0 Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> --- M libflashrom.h M writeprotect.c 2 files changed, 32 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/82/58482/47 -- To view, visit https://review.coreboot.org/c/flashrom/+/58482 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I7d26f43fb05c5828b9839bb57a28fa1088dcd9a0 Gerrit-Change-Number: 58482 Gerrit-PatchSet: 47 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: cli_classic: Use flashrom_init() from API
by Anastasia Klimchuk (Code Review) 22 Feb '22

22 Feb '22

Attention is currently required from: Nico Huber, Edward O'Callaghan, Angel Pons. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/61582 ) Change subject: cli_classic: Use flashrom_init() from API ...................................................................... Patch Set 2: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/flashrom/+/61582/comment/11219216_741cc32f PS2, Line 14: TEST=`make` Could you please run this once, probe for example? Thank you! Otherwise all good! -- To view, visit https://review.coreboot.org/c/flashrom/+/61582 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I07faeed876f678c35355621a080c7852eed16824 Gerrit-Change-Number: 61582 Gerrit-PatchSet: 2 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Tue, 22 Feb 2022 05:48:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: cli_classic: Replace programmer_shutdown() with libflashrom call
by Edward O'Callaghan (Code Review) 22 Feb '22

22 Feb '22

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/61584 ) Change subject: cli_classic: Replace programmer_shutdown() with libflashrom call ...................................................................... cli_classic: Replace programmer_shutdown() with libflashrom call flashrom_programmer_shutdown(NULL) is an equiv call to programmer_shutdown() however this further decouples cli from flashrom core logic at link-time, prefering to instead enter via libflashrom instead. BUG=none TEST=`make`. Change-Id: Ie194fa2e891797a29d05d7e9d0c7226fd62c0679 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/61584 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M cli_classic.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/cli_classic.c b/cli_classic.c index 3391af5..4a5f298 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -957,7 +957,7 @@ out_release: flashrom_layout_release(layout); out_shutdown: - programmer_shutdown(); + flashrom_programmer_shutdown(NULL); out: for (i = 0; i < chipcount; i++) { flashrom_layout_release(flashes[i].default_layout); 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/flashrom/+/61584 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie194fa2e891797a29d05d7e9d0c7226fd62c0679 Gerrit-Change-Number: 61584 Gerrit-PatchSet: 3 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in flashrom[master]: cli_classic: Use flashrom_flash_getsize() over raw access
by Edward O'Callaghan (Code Review) 22 Feb '22

22 Feb '22

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/61583 ) Change subject: cli_classic: Use flashrom_flash_getsize() over raw access ...................................................................... cli_classic: Use flashrom_flash_getsize() over raw access Use native libflashrom entry-points for getting flash size over accessing internal struct members within cli code. BUG=none TEST=`sudo ./flashrom -p internal --get-size`. Change-Id: Iff70a0de1dee517c4e38c45b1540c42326a13340 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/61583 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M cli_classic.c 1 file changed, 5 insertions(+), 5 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/cli_classic.c b/cli_classic.c index 8c337eb..3391af5 100644 --- a/cli_classic.c +++ b/cli_classic.c @@ -158,7 +158,7 @@ { int ret; - unsigned long size = flash->chip->total_size * 1024; + unsigned long size = flashrom_flash_getsize(flash); unsigned char *buf = calloc(size, sizeof(unsigned char)); if (!buf) { msg_gerr("Memory allocation failed!\n"); @@ -189,7 +189,7 @@ static int do_write(struct flashctx *const flash, const char *const filename, const char *const referencefile) { - const size_t flash_size = flash->chip->total_size * 1024; + const size_t flash_size = flashrom_flash_getsize(flash); int ret = 1; uint8_t *const newcontents = malloc(flash_size); @@ -225,7 +225,7 @@ static int do_verify(struct flashctx *const flash, const char *const filename) { - const size_t flash_size = flash->chip->total_size * 1024; + const size_t flash_size = flashrom_flash_getsize(flash); int ret = 1; uint8_t *const newcontents = malloc(flash_size); @@ -809,7 +809,7 @@ } if (flash_size) { - printf("%d\n", fill_flash->chip->total_size * 1024); + printf("%ld\n", flashrom_flash_getsize(fill_flash)); goto out_shutdown; } @@ -846,7 +846,7 @@ } free(fmapfile_buffer); } else if (fmap && (flashrom_layout_read_fmap_from_rom(&layout, fill_flash, 0, - fill_flash->chip->total_size * 1024) || process_include_args(layout, include_args))) { + flashrom_flash_getsize(fill_flash)) || process_include_args(layout, include_args))) { ret = 1; goto out_shutdown; } 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/flashrom/+/61583 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iff70a0de1dee517c4e38c45b1540c42326a13340 Gerrit-Change-Number: 61583 Gerrit-PatchSet: 3 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in flashrom[master]: intel: Add Alder Lake support [WIP]
by Edward O'Callaghan (Code Review) 22 Feb '22

22 Feb '22

Attention is currently required from: Edward O'Callaghan. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/62251 to look at the new patch set (#2). Change subject: intel: Add Alder Lake support [WIP] ...................................................................... intel: Add Alder Lake support [WIP] Get this moving for Intel. BUG=b:XXX TEST=<none> Change-Id: Ie66cf519df13f3391c41f5016b16a81ef3dfd4bf Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M chipset_enable.c M ich_descriptors.c M ichspi.c M programmer.h M util/ich_descriptors_tool/ich_descriptors_tool.c 5 files changed, 31 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/51/62251/2 -- To view, visit https://review.coreboot.org/c/flashrom/+/62251 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie66cf519df13f3391c41f5016b16a81ef3dfd4bf Gerrit-Change-Number: 62251 Gerrit-PatchSet: 2 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: intel: Add Alder Lake support [WIP]
by Edward O'Callaghan (Code Review) 22 Feb '22

22 Feb '22

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/62251 ) Change subject: intel: Add Alder Lake support [WIP] ...................................................................... intel: Add Alder Lake support [WIP] Get this moving for Intel. BUG=b:XXX TEST=<none> Change-Id: Ie66cf519df13f3391c41f5016b16a81ef3dfd4bf Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M chipset_enable.c M ich_descriptors.c M ichspi.c M programmer.h M util/ich_descriptors_tool/ich_descriptors_tool.c 5 files changed, 30 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/51/62251/1 diff --git a/chipset_enable.c b/chipset_enable.c index d9a1d3a..faa4ac2 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -607,6 +607,7 @@ case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_ELKHART_LAKE: case CHIPSET_APOLLO_LAKE: + case CHIPSET_ALDER_LAKE: case CHIPSET_GEMINI_LAKE: reg_name = "BIOS_SPI_BC"; gcs = pci_read_long(dev, 0xdc); @@ -712,6 +713,7 @@ boot_straps = boot_straps_pch500; break; case CHIPSET_APOLLO_LAKE: + case CHIPSET_ALDER_LAKE: case CHIPSET_GEMINI_LAKE: case CHIPSET_ELKHART_LAKE: boot_straps = boot_straps_apl; @@ -742,6 +744,7 @@ case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_APOLLO_LAKE: + case CHIPSET_ALDER_LAKE: case CHIPSET_GEMINI_LAKE: case CHIPSET_ELKHART_LAKE: bbs = (gcs >> 6) & 0x1; @@ -1008,6 +1011,10 @@ { return enable_flash_pch100_or_c620(dev, name, 0x0d, 2, CHIPSET_GEMINI_LAKE); } +static int enable_flash_ald(struct pci_dev *const dev, const char *const name) +{ + return enable_flash_pch100_or_c620(dev, name, 0x0d, 2, CHIPSET_ALDER_LAKE); +} /* Silvermont architecture: Bay Trail(-T/-I), Avoton/Rangeley. * These have a distinctly different behavior compared to other Intel chipsets and hence are handled separately. @@ -2111,6 +2118,7 @@ {0x8086, 0xa2d2, B_S, NT, "Intel", "X299", enable_flash_pch100}, {0x8086, 0x5ae8, B_S, DEP, "Intel", "Apollo Lake", enable_flash_apl}, {0x8086, 0x5af0, B_S, DEP, "Intel", "Apollo Lake", enable_flash_apl}, + {0x8086, 0x54a4, B_S, DEP, "Intel", "Alder Lake", enable_flash_adl}, {0x8086, 0x3197, B_S, NT, "Intel", "Gemini Lake", enable_flash_glk}, {0x8086, 0x31e8, B_S, DEP, "Intel", "Gemini Lake", enable_flash_glk}, {0x8086, 0x4b24, B_S, DEP, "Intel", "Elkhart Lake", enable_flash_mcc}, diff --git a/ich_descriptors.c b/ich_descriptors.c index 0ce5720..6e64858 100644 --- a/ich_descriptors.c +++ b/ich_descriptors.c @@ -40,6 +40,7 @@ { switch (cs) { case CHIPSET_APOLLO_LAKE: + case CHIPSET_ALDER_LAKE: case CHIPSET_GEMINI_LAKE: return 6; case CHIPSET_C620_SERIES_LEWISBURG: @@ -72,6 +73,7 @@ switch (cs) { case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_APOLLO_LAKE: + case CHIPSET_ALDER_LAKE: case CHIPSET_GEMINI_LAKE: case CHIPSET_ELKHART_LAKE: if (cont->NM <= MAX_NUM_MASTERS) @@ -207,6 +209,7 @@ case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_APOLLO_LAKE: + case CHIPSET_ALDER_LAKE: case CHIPSET_GEMINI_LAKE: case CHIPSET_ELKHART_LAKE: { uint8_t size_enc; @@ -297,6 +300,7 @@ case CHIPSET_400_SERIES_COMET_POINT: return freq_str[1][value]; case CHIPSET_APOLLO_LAKE: + case CHIPSET_ALDER_LAKE: case CHIPSET_GEMINI_LAKE: return freq_str[2][value]; case CHIPSET_500_SERIES_TIGER_POINT: @@ -347,6 +351,7 @@ case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_APOLLO_LAKE: + case CHIPSET_ALDER_LAKE: case CHIPSET_GEMINI_LAKE: case CHIPSET_ELKHART_LAKE: has_flill1 = true; @@ -528,7 +533,8 @@ desc->master.mstr[i].write & (1 << j) ? 'w' : ' '); msg_pdbg2("\n"); } - } else if (cs == CHIPSET_APOLLO_LAKE || cs == CHIPSET_GEMINI_LAKE || cs == CHIPSET_ELKHART_LAKE) { + } else if (cs == CHIPSET_APOLLO_LAKE || cs == CHIPSET_ALDER_LAKE + || cs == CHIPSET_GEMINI_LAKE || cs == CHIPSET_ELKHART_LAKE) { const char *const master_names[] = { "BIOS", "TXE", }; if (nm > (ssize_t)ARRAY_SIZE(master_names)) { msg_pdbg2("%s: number of masters too high (%d).\n", __func__, desc->content.NM); @@ -996,6 +1002,8 @@ if (content->FLMAP2 == 0) { if (content->ISL == 19) return CHIPSET_APOLLO_LAKE; + if (content->ISL == 19) // XXX ??? + return CHIPSET_ALDER_LAKE; if (content->ISL == 23) return CHIPSET_GEMINI_LAKE; warn_peculiar_desc("Gemini Lake"); @@ -1054,6 +1062,7 @@ case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_500_SERIES_TIGER_POINT: + case CHIPSET_ALDER_LAKE: case CHIPSET_GEMINI_LAKE: case CHIPSET_ELKHART_LAKE: /* `freq_read` was repurposed, so can't check on it any more. */ @@ -1211,6 +1220,7 @@ case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_APOLLO_LAKE: + case CHIPSET_ALDER_LAKE: case CHIPSET_GEMINI_LAKE: case CHIPSET_ELKHART_LAKE: if (idx == 0) { @@ -1250,6 +1260,7 @@ case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_APOLLO_LAKE: + case CHIPSET_ALDER_LAKE: case CHIPSET_GEMINI_LAKE: case CHIPSET_ELKHART_LAKE: mmio_le_writel(control, spibar + PCH100_REG_FDOC); diff --git a/ichspi.c b/ichspi.c index 117ff8d..15ce568 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1782,6 +1782,7 @@ case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_APOLLO_LAKE: + case CHIPSET_ALDER_LAKE: case CHIPSET_GEMINI_LAKE: case CHIPSET_ELKHART_LAKE: *num_pr = 6; /* Includes GPR0 */ @@ -1818,6 +1819,7 @@ case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_APOLLO_LAKE: + case CHIPSET_ALDER_LAKE: case CHIPSET_GEMINI_LAKE: case CHIPSET_ELKHART_LAKE: *num_freg = 16; @@ -1876,6 +1878,7 @@ case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_APOLLO_LAKE: + case CHIPSET_ALDER_LAKE: case CHIPSET_GEMINI_LAKE: case CHIPSET_ELKHART_LAKE: tmp = mmio_readl(spibar + PCH100_REG_DLOCK); @@ -1953,6 +1956,7 @@ case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_APOLLO_LAKE: + case CHIPSET_ALDER_LAKE: case CHIPSET_GEMINI_LAKE: case CHIPSET_BAYTRAIL: case CHIPSET_ELKHART_LAKE: @@ -1989,6 +1993,7 @@ case CHIPSET_400_SERIES_COMET_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_APOLLO_LAKE: + case CHIPSET_ALDER_LAKE: case CHIPSET_GEMINI_LAKE: case CHIPSET_ELKHART_LAKE: break; @@ -2029,6 +2034,7 @@ if (ich_spi_mode == ich_auto && (ich_gen == CHIPSET_APOLLO_LAKE || + ich_gen == CHIPSET_ALDER_LAKE || ich_gen == CHIPSET_GEMINI_LAKE || ich_gen == CHIPSET_ELKHART_LAKE)) { msg_pdbg("Enabling hardware sequencing by default for Apollo/Gemini/Elkhart Lake.\n"); diff --git a/programmer.h b/programmer.h index 08e5e9c..376b819 100644 --- a/programmer.h +++ b/programmer.h @@ -351,6 +351,7 @@ CHIPSET_400_SERIES_COMET_POINT, CHIPSET_500_SERIES_TIGER_POINT, CHIPSET_APOLLO_LAKE, + CHIPSET_ALDER_LAKE, CHIPSET_GEMINI_LAKE, CHIPSET_ELKHART_LAKE, }; diff --git a/util/ich_descriptors_tool/ich_descriptors_tool.c b/util/ich_descriptors_tool/ich_descriptors_tool.c index f743510..6030a0b 100644 --- a/util/ich_descriptors_tool/ich_descriptors_tool.c +++ b/util/ich_descriptors_tool/ich_descriptors_tool.c @@ -127,6 +127,7 @@ "\t- \"ich10\",\n" "\t- \"silvermont\" for chipsets from Intel's Silvermont architecture (e.g. Bay Trail),\n" "\t- \"apollo\" for Intel's Apollo Lake SoC.\n" +"\t- \"alder\" for Intel's Alder Lake SoC.\n" "\t- \"gemini\" for Intel's Gemini Lake SoC.\n" "\t- \"5\" or \"ibex\" for Intel's 5 series chipsets,\n" "\t- \"6\" or \"cougar\" for Intel's 6 series chipsets,\n" @@ -236,6 +237,8 @@ cs = CHIPSET_500_SERIES_TIGER_POINT; else if (strcmp(csn, "apollo") == 0) cs = CHIPSET_APOLLO_LAKE; + else if (strcmp(csn, "alder") == 0) + cs = CHIPSET_ALDER_LAKE; else if (strcmp(csn, "gemini") == 0) cs = CHIPSET_GEMINI_LAKE; else if (strcmp(csn, "elkhart") == 0) -- To view, visit https://review.coreboot.org/c/flashrom/+/62251 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie66cf519df13f3391c41f5016b16a81ef3dfd4bf Gerrit-Change-Number: 62251 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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Change in flashrom[master]: hwaccess_x86_io: clean header concept
by Thomas Heijligen (Code Review) 22 Feb '22

22 Feb '22

Attention is currently required from: Nico Huber, Angel Pons. Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/61276 ) Change subject: hwaccess_x86_io: clean header concept ...................................................................... Patch Set 13: (2 comments) File hwaccess_x86_io.c: https://review.coreboot.org/c/flashrom/+/61276/comment/2191a247_7f77e4aa PS13, Line 63: #define IO_PORT_PERMISSION USE_IOPL > That's new, isn't it? I've may lost this on the way. I'll have a look for it https://review.coreboot.org/c/flashrom/+/61276/comment/52708e86_8026a8d8 PS13, Line 67: #if defined(__linux__) && !defined(__ANDROID__) > What happened to __GLIBC__? […] iopl should work with all libc's on Linux. for freebsd-glibc I have to try. There is no maintaind Version of it as far as I know. Debian GNU/kFreeBSD and Gentoo FreeBSD are abandoned for years -- To view, visit https://review.coreboot.org/c/flashrom/+/61276 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I1400704e9ac5fed00c096796536108d5bfb875e3 Gerrit-Change-Number: 61276 Gerrit-PatchSet: 13 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 21 Feb 2022 23:29:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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Change in flashrom[master]: hwaccess_x86_io: clean header concept
by Nico Huber (Code Review) 22 Feb '22

22 Feb '22

Attention is currently required from: Thomas Heijligen, Angel Pons. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/61276 ) Change subject: hwaccess_x86_io: clean header concept ...................................................................... Patch Set 13: Code-Review+1 (3 comments) Patchset: PS13: We should definitely build-test this... File hwaccess_x86_io.c: https://review.coreboot.org/c/flashrom/+/61276/comment/22bbe655_5d99edd2 PS13, Line 63: #define IO_PORT_PERMISSION USE_IOPL That's new, isn't it? https://review.coreboot.org/c/flashrom/+/61276/comment/796cb82b_d71d593c PS13, Line 67: #if defined(__linux__) && !defined(__ANDROID__) What happened to __GLIBC__? One tricky case seems to be FreeBSD-glibc, with USE_DEV but `sys/io.h`. -- To view, visit https://review.coreboot.org/c/flashrom/+/61276 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I1400704e9ac5fed00c096796536108d5bfb875e3 Gerrit-Change-Number: 61276 Gerrit-PatchSet: 13 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 21 Feb 2022 22:33:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: Makefile: print version info as part of the config target
by Nico Huber (Code Review) 22 Feb '22

22 Feb '22

Attention is currently required from: Felix Singer, Thomas Heijligen. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62199 ) Change subject: Makefile: print version info as part of the config target ...................................................................... Patch Set 3: (1 comment) File Makefile: https://review.coreboot.org/c/flashrom/+/62199/comment/052e24e2_45e3719e PS2, Line 899: PROGRAM > what about lib$(PROGRAM). […] Dunno, it seems odd. I would just leave it as is. To me $(PROGRAM) is about the frontend. libflashrom, OTOH, is just libflashrom. -- To view, visit https://review.coreboot.org/c/flashrom/+/62199 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I1a846acfd8d2e0a9fc8b02c078b6ac0342438490 Gerrit-Change-Number: 62199 Gerrit-PatchSet: 3 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Comment-Date: Mon, 21 Feb 2022 22:08:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Thomas Heijligen <src(a)posteo.de> Gerrit-MessageType: comment

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