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Change subject: flashchips: Add support for GigaDevice GD25LR256E, GD251R512ME
......................................................................
Patch Set 8:
(10 comments)
Patchset:
PS8:
> I read through the comments thread to recall what the patch have been waiting for. […]
Many thanks to Victor on the mailing list for giving datasheets, I did a review and added some comments.
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/58025/comment/76651360_3fec0d74 :
PS8, Line 6552: .name = "GD25LR256E",
This is out of order, both entries need to be moved after GD25LQ80 and just before GD25Q10
https://review.coreboot.org/c/flashrom/+/58025/comment/0deca606_33434b56 :
PS8, Line 6590: SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD
Datasheet has BP4, so this should be `SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD`
https://review.coreboot.org/c/flashrom/+/58025/comment/343681e1_32b6595a :
PS8, Line 6591: SPI_DISABLE_BLOCKPROTECT
SPI_DISABLE_BLOCKPROTECT_BP4_SRWD
https://review.coreboot.org/c/flashrom/+/58025/comment/e256659a_175ff710 :
PS8, Line 6594: {1600, 2000}
Slight correction : from datasheet it's 1.65~2.0V
https://review.coreboot.org/c/flashrom/+/58025/comment/69474edd_5fc8758d :
PS8, Line 6599: .tb = {STATUS1, 6, RW},
In such cases you should add a comment:
`Called BP4 in datasheet, acts like TB`
https://review.coreboot.org/c/flashrom/+/58025/comment/4ea82095_fcd0841a :
PS8, Line 6646: SPI_PRETTYPRINT_STATUS_REGISTER_BP3_SRWD
SPI_PRETTYPRINT_STATUS_REGISTER_BP4_SRWD
https://review.coreboot.org/c/flashrom/+/58025/comment/f67121aa_1a0a7e2d :
PS8, Line 6647: SPI_DISABLE_BLOCKPROTECT
SPI_DISABLE_BLOCKPROTECT_BP4_SRWD
https://review.coreboot.org/c/flashrom/+/58025/comment/b194c85c_4bf5c3fd :
PS8, Line 6650: {1600, 2000},
1.65~2.0V
https://review.coreboot.org/c/flashrom/+/58025/comment/410965dc_2c5da58a :
PS8, Line 6655: .tb = {STATUS1, 6, RW},
Also as above, needs a comment:
`Called BP4 in datasheet, acts like TB`
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Alexander Goncharov has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/82197?usp=email )
Change subject: doc: Add doc for supported flash chips
......................................................................
Patch Set 2:
(4 comments)
Patchset:
PS1:
> The old page is here: https://wiki.flashrom.org/Supported_hardware#Supported_flash_chips […]
Yeah, great idea! As far as I can see last time it was updated in 2013! More than 10 years ago...
But having a table of supported hardware is really handy. I think it makes sense to spend time on finding any built-in methods in sphinx that can help us maintain a table in this document instead of the wiki.
File doc/supported_hw/supported_flashchips.rst:
https://review.coreboot.org/c/flashrom/+/82197/comment/24a35ed4_872eb23b :
PS2, Line 12: Alternatively inspect the file on the `web UI of our GitHub mirror <https://github.com/flashrom/flashrom/blob/main/flashchips.c>`_.
I would suggest moving this paragraph to the first one, because they're logically related
https://review.coreboot.org/c/flashrom/+/82197/comment/20b1798b_115ac143 :
PS2, Line 14: If you want to check whether a flash chip is supported in the given release, you can rebase your local
: repo at the release tag, alternatively select a tag/branch in GitHub web UI (dropdown on the top-left).
It doesn't sound like a really user-friendly method to check whether a desired flash chip is supported :(
Can we maintain a list of supported chips for a specific release as a text file? Looks like we have to add it to the upcoming agenda :D
https://review.coreboot.org/c/flashrom/+/82197/comment/72490d88_8e7bc1d2 :
PS2, Line 23: Instructions how to update tested status of the chip are here: :doc:`/contrib_howtos/how_to_mark_chip_tested`.
:
: Instructions how to add support for a chip are here: :doc:`/contrib_howtos/how_to_add_new_chip`.
How about just adding them as a "related topics" list?
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Change subject: erasure_layout: don't copy region buffers if they're null/zero-size
......................................................................
Patch Set 2:
(1 comment)
File erasure_layout.c:
https://review.coreboot.org/c/flashrom/+/81548/comment/0c1561f9_cb1bdc70 :
PS1, Line 263: old_start_buf = (uint8_t *)malloc(old_start - region_start);
: if (!old_start_buf) {
: msg_cerr("Not enough memory!\n");
: ret = -1;
: goto _end;
: }
: old_end_buf = (uint8_t *)malloc(region_end - old_end);
: if (!old_end_buf) {
: msg_cerr("Not enough memory!\n");
: ret = -1;
: goto _end;
: }
> Thanks for the details, Anastasia! Yeah, I will dive deeper to see possible solutions and understand […]
Sorry it took longer than I expected. Please, Anastasia, check out the new patch set
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Hello Aarya, Anastasia Klimchuk, Nikolai Artemiev, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/81548?usp=email
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The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: erasure_layout: don't copy region buffers if they're null/zero-size
......................................................................
erasure_layout: don't copy region buffers if they're null/zero-size
memcpy() function expects 2nd parameter to be non-null. Make sure that
the pointer is null before passing it to the function.
Also move allocations under if conditions to avoid allocating memory for
a potentially 0 size.
Found-by: scan-build, clang v17.0.6
Signed-off-by: Alexander Goncharov <chat(a)joursoir.net>
Change-Id: I99aad4119f9c11bea75e3419926cc833bc1f68c5
---
M erasure_layout.c
1 file changed, 30 insertions(+), 24 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/48/81548/2
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Change subject: flashchips: Add support for Boya B25Q64AS
......................................................................
Patch Set 1: Code-Review+1
(2 comments)
Patchset:
PS1:
Malcolm thank you for the patch! I have just one comment.
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/82259/comment/a1d1cbe6_f96086f7 :
PS1, Line 3640: SPI_DISABLE_BLOCKPROTECT_AT25FS040
I think SPI_DISABLE_BLOCKPROTECT_BP4_SRWD is more correct in this case
which is
> A common block protection disable that tries to unset the status register bits masked by 0x7C (BP0-4) and protected/locked by bit #7.
(Even if it might internally comes down to the same thing)
As I understand you were not testing write protection anyway, right?
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Change subject: tests: Remove mock struct pci_dev, use real pci symbols in tests
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Change subject: tests: Add test for extract operation
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Change subject: layout: Hoist prepare_layout_for_extraction into libflashrom API
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Change subject: layout: Change signature for prepare_layout_for_extraction
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