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Change subject: flashrom: rewrite flashbuses_to_text()
......................................................................
Patch Set 4:
(4 comments)
File flashrom.c:
https://review.coreboot.org/c/flashrom/+/73039/comment/0b55dc0d_59cfeab5
PS4, Line 918: Get
You can leave "return" in this case, I think return sounds good here.
https://review.coreboot.org/c/flashrom/+/73039/comment/a8ffe165_edecbaa7
PS4, Line 924: char *ret, *ptr;
I am going to ask silly question: why do you need both?
If there is a reason, I think it can be a comment.
https://review.coreboot.org/c/flashrom/+/73039/comment/d4482b8d_7964f041
PS4, Line 935: Once all chipsets and flash chips have been updated
An open question to everyone who reads this: what does it even mean? :)
Specifically, I am wondering what should happen so that this fixme can be fixed.
https://review.coreboot.org/c/flashrom/+/73039/comment/fae9aaca_19543361
PS4, Line 938: if (bustype == BUS_NONSPI)
: return strdup("Non-SPI");
: if (bustype == BUS_NONE)
: return strdup(bustypes[bustype]);
These first two cases (BUS_NONSPI and BUS_NONE) are specially handled in the code, I understand why, but what looks a bit odd is that the former is hard-coded, the latter is taken from an array. Why the difference? Do you need BUS_NONE is the array? Maybe make it hard-coded too, and remove from array?
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Change subject: flashchips: Mark XMC XM25QH256C as TEST_OK_PR
......................................................................
Patch Set 2: Code-Review+2
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Change subject: flashchips: Mark XMC XM25QH64C as TEST_OK_PREW
......................................................................
Patch Set 1: Code-Review+2
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Change subject: wbsio_spi.c: Convert to direct driver entry
......................................................................
Patch Set 2:
(3 comments)
This change is ready for review.
Patchset:
PS1:
> * Add `wbsio_spi` to meson_options. […]
Done
File meson.build:
https://review.coreboot.org/c/flashrom/+/72864/comment/0e9be5f3_54718f24
PS1, Line 310: 'wbsio_spi' : {
> ``` […]
Done
File wbsio_spi.c:
https://review.coreboot.org/c/flashrom/+/72864/comment/721d8870_6367b43a
PS1, Line 17: #include <stdlib.h>
> Add `#include <string. […]
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Change subject: board_enable.c: Drop Intel D201GLY entry for wbsio_spi drv
......................................................................
Patch Set 2:
(1 comment)
This change is ready for review.
Patchset:
PS1:
> Can you copy the line into a comment in the wbsio_spi. […]
Done
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Change subject: dummyflasher: Add basic WP support for opaque VARIABLE_SIZE chip
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/flashrom/+/73289/comment/33884e74_853ccb4a
PS2, Line 9: Since VARIABLE_SIZE emulated chips do not correspond to actual flash chip models, no active protection modes are supported:
> Please use a line break here
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Hello build bot (Jenkins), Thomas Heijligen, Edward O'Callaghan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/73289
to look at the new patch set (#3).
Change subject: dummyflasher: Add basic WP support for opaque VARIABLE_SIZE chip
......................................................................
dummyflasher: Add basic WP support for opaque VARIABLE_SIZE chip
Since VARIABLE_SIZE emulated chips do not correspond to actual flash
chip models, no active protection modes are supported:
- read_wp_cfg always returns mode=disabled,range=0,0
- write_wp_cfg only accepts mode=disabled,range=0,0
However this is sufficient to support use cases where the user just
needs to verify that write protection is not enabled, as is the case in
some futility unit tests.
BUG=b:238694831,b:260531154
BRANCH=none
TEST=none
Change-Id: I4348e0175b8c743365904f5e61fdb69e3f4f4db5
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M dummyflasher.c
1 file changed, 53 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/89/73289/3
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: flashchips: Mark XMC XM25QH256C as TEST_OK_PR
......................................................................
flashchips: Mark XMC XM25QH256C as TEST_OK_PR
As reported on the mailing list[0] this flashchip was successfully
probed and read with a ch341a programmer.
[0] https://mail.coreboot.org/hyperkitty/list/flashrom@flashrom.org/message/BFB…
Change-Id: I68d0315f7b29f27ac84374ea7cc69dca207bbacb
Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.com>
---
M flashchips.c
1 file changed, 16 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/62/73362/2
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