September 2022 - flashrom-gerrit

[S] Change in flashrom[master]: spi.c: Add erasefn and opcodes for AT45 and S25F
by Nico Huber (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Simon Buhrow, Thomas Heijligen, Aarya. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/67354 ) Change subject: spi.c: Add erasefn and opcodes for AT45 and S25F ...................................................................... Patch Set 2: (1 comment) File spi.c: https://review.coreboot.org/c/flashrom/+/67354/comment/2ae48d33_e70d875b PS2, Line 50: &spi_erase_at45cs_sector, 0x50}, > Maybe we can make a separate probe_opcode function for this chip? That could work too. Given that the chip has only a single erasefunc, that function would be simpler. But I'm not sure if it wouldn't be more code overall and we'd also have yet another pointer in struct flashchip. What I would do: Keep spi_get_erasefn_from_opcode() in `spi25.c`. After all that is the scope it's supposed to support. Implement spi_get_opcode_from_erasefn() here, let it return a list of codes `const uint8_t *`. Its code doesn't even have to change (beside returning NULL instead of 0x00). The struct for function_opcode_list[] would get an `uint8_t opcodes[3]`. Fields omitted are 0, so we'd only have to add some more braces and get a 0-termination for free. The caller would get a simple loop that stops when it encounters a 0. That would leave us with two very similar lists for both functions. But I don't think it's too bad, after all they serve different purposes. -- To view, visit https://review.coreboot.org/c/flashrom/+/67354 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ief25932120f940dea0ffe161a79219deecb2e8ab Gerrit-Change-Number: 67354 Gerrit-PatchSet: 2 Gerrit-Owner: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Simon Buhrow Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Simon Buhrow Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Comment-Date: Tue, 06 Sep 2022 22:05:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Thomas Heijligen <src(a)posteo.de> Comment-In-Reply-To: Aarya <aarya.chaumal(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in flashrom[master]: spi.c: Add erasefn and opcodes for AT45 and S25F
by Aarya (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Simon Buhrow, Nico Huber, Thomas Heijligen. Aarya has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/67354 ) Change subject: spi.c: Add erasefn and opcodes for AT45 and S25F ...................................................................... Patch Set 2: (1 comment) File spi.c: https://review.coreboot.org/c/flashrom/+/67354/comment/321af962_5901dffb PS2, Line 50: &spi_erase_at45cs_sector, 0x50}, > That is quite annoying. The logical thing to do would be to return both […] Maybe we can make a separate probe_opcode function for this chip? -- To view, visit https://review.coreboot.org/c/flashrom/+/67354 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ief25932120f940dea0ffe161a79219deecb2e8ab Gerrit-Change-Number: 67354 Gerrit-PatchSet: 2 Gerrit-Owner: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Simon Buhrow Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Simon Buhrow Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Comment-Date: Tue, 06 Sep 2022 13:40:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Thomas Heijligen <src(a)posteo.de> Gerrit-MessageType: comment

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[S] Change in flashrom[master]: ichspi.c: Retype appropiate variables with bool
by Angel Pons (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Felix Singer, Nico Huber. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/66892 ) Change subject: ichspi.c: Retype appropiate variables with bool ...................................................................... Patch Set 10: (1 comment) File ichspi.c: https://review.coreboot.org/c/flashrom/+/66892/comment/3659f8b3_ae63165e PS7, Line 872: write_cmd = true; IMHO, if this was a single "treewide: retype variables as bool where appropriate", I might consider renaming them in a separate commit, but I'd rather do the retyping and renaming at the same time, and make multiple commits for sub-areas. We already have a bunch of commits doing the retyping; if we did the renaming in separate commits, we'd have twice as many commits, which results in too much overhead: more commit messages to write, more work to manually rebase stuff, more commits to review and submit... If you still want to make separate commits to rename the variables, note that they should be reproducible, so I'd like you to verify that this is the case using timeless builds. Felix, I can see why Nico's third message may have sounded harsh or otherwise unpleasant, but I'm sure he didn't mean it. I too would be confused after you marked the comment thread as resolved without further discussion, and I also believe that making two commits to change the same lines twice is wasteful. It would've been better if Nico would have explained a bit more why he thinks renaming the variables in the same commit that retypes them. But I know that Nico would've done so, if he had been asked to. Maybe I'm obsessed with trying not to sound rude, but I would've tried to provide the same reasons but from a "positive" point of view. I feel that "this needs to be fixed/improved by doing X" is a rather negative message, and I much prefer using something like "this is good, but doing X is even better". I believe we should strive for improvement, always trying to make things better. This is how I'd explain my thoughts for renaming in the same commits: > Assuming we agree that renaming the variables is a good thing, doing it in the same commit is less work for the reviewers and less work for the authors as well, if the changes need to be manually rebased (which is usually the case when discussions become sour). The end result is the same (bool variables with meaningful names), but it's less work for all parties involved. It's a win-win situation. -- To view, visit https://review.coreboot.org/c/flashrom/+/66892 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: If7eeacc44921f52aa593ab1302f17a5c5190f830 Gerrit-Change-Number: 66892 Gerrit-PatchSet: 10 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Tue, 06 Sep 2022 10:32:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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[S] Change in flashrom[master]: spi.c: Add erasefn and opcodes for AT45 and S25F
by Nico Huber (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Simon Buhrow, Thomas Heijligen, Aarya. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/67354 ) Change subject: spi.c: Add erasefn and opcodes for AT45 and S25F ...................................................................... Patch Set 2: (1 comment) File spi.c: https://review.coreboot.org/c/flashrom/+/67354/comment/459b7416_bd0586ef PS2, Line 50: &spi_erase_at45cs_sector, 0x50}, > Nico, please have a look here at45db.c:417 spi_erase_at45cs_sector(). […] That is quite annoying. The logical thing to do would be to return both at once, and then call probe_opcode() for each of them. Either as array (0-terminated would be easiest) or multiple opcodes encoded into one integer, e.g. {&spi_erase_at45cs_sector, 0x7c << 8 | 0x50}, What makes it even more annoying is that we would have to adapt the spi_get_erasefn_from_opcode() function too, if it should keep using the same list (even though we know it won't be called for AT45 chips). Not sure what is the best way to go forward. -- To view, visit https://review.coreboot.org/c/flashrom/+/67354 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ief25932120f940dea0ffe161a79219deecb2e8ab Gerrit-Change-Number: 67354 Gerrit-PatchSet: 2 Gerrit-Owner: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Simon Buhrow Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Simon Buhrow Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Comment-Date: Tue, 06 Sep 2022 10:06:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Thomas Heijligen <src(a)posteo.de> Gerrit-MessageType: comment

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[M] Change in flashrom[master]: tree: Move PCI IDs into their own header file
by Angel Pons (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Felix Singer, Nico Huber, Thomas Heijligen. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/66864 ) Change subject: tree: Move PCI IDs into their own header file ...................................................................... Patch Set 6: (1 comment) Patchset: PS5: > > > nobody cares how the local code looks like. […] IMHO I believe flashrom doesn't benefit from vendor/device ID macros in most cases, as we have a string associated with VID/PID pairs, e.g. chipset_enable.c `chipset_enables` array. We rarely need to reference device IDs more than once. The only place where I see a bit of redundancy is in nicintel code: flashrom has two separate programmers for SPI and EEPROM, and there are NICs with both. So some IDs appear in two files. I don't see a good way to unify this that can be considered an improvement. -- To view, visit https://review.coreboot.org/c/flashrom/+/66864 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id48407be4ceae7a3953179050e0a991f6d8335f0 Gerrit-Change-Number: 66864 Gerrit-PatchSet: 6 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Comment-Date: Tue, 06 Sep 2022 10:03:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Thomas Heijligen <src(a)posteo.de> Comment-In-Reply-To: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: comment

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[S] Change in flashrom[master]: spi.c: Add erasefn and opcodes for AT45 and S25F
by Thomas Heijligen (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Simon Buhrow, Nico Huber, Aarya. Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/67354 ) Change subject: spi.c: Add erasefn and opcodes for AT45 and S25F ...................................................................... Patch Set 2: Code-Review+1 (2 comments) Commit Message: https://review.coreboot.org/c/flashrom/+/67354/comment/fc8cfc1a_d64ae7e1 PS2, Line 7: spi.c: Add erasefn and opcodes for AT45 and S25F To what? / To which lookup list? File spi.c: https://review.coreboot.org/c/flashrom/+/67354/comment/cd30af35_d9910c53 PS2, Line 50: &spi_erase_at45cs_sector, 0x50}, Nico, please have a look here at45db.c:417 spi_erase_at45cs_sector(). The opcode might be variable. -- To view, visit https://review.coreboot.org/c/flashrom/+/67354 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ief25932120f940dea0ffe161a79219deecb2e8ab Gerrit-Change-Number: 67354 Gerrit-PatchSet: 2 Gerrit-Owner: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Simon Buhrow Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Simon Buhrow Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Comment-Date: Tue, 06 Sep 2022 09:32:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in flashrom[master]: spi.c: Move spi_get_erasefn_from_opcode to spi.c
by Thomas Heijligen (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Simon Buhrow, Nico Huber, Aarya. Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/67368 ) Change subject: spi.c: Move spi_get_erasefn_from_opcode to spi.c ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/67368 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I3263b7642c35e7fd1da0002175123e5560d94752 Gerrit-Change-Number: 67368 Gerrit-PatchSet: 1 Gerrit-Owner: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Simon Buhrow Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Simon Buhrow Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Comment-Date: Tue, 06 Sep 2022 09:18:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in flashrom[master]: flashrom.c:Add function to get a flattened view of the chip erase blocks
by Thomas Heijligen (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Simon Buhrow, Nico Huber, Aarya. Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/65879 ) Change subject: flashrom.c:Add function to get a flattened view of the chip erase blocks ...................................................................... Patch Set 25: (1 comment) File flashrom.c: https://review.coreboot.org/c/flashrom/+/65879/comment/9beacc47_7daf9821 PS24, Line 1088: for (i = 0; i < NUM_ERASEFUNCTIONS; i++) { > Yeah, changing the for-loop's condition like this won't work. The body […] Yes, sorry, the main point should be the body where the indexed value is represented by a local variable. -- To view, visit https://review.coreboot.org/c/flashrom/+/65879 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iafe78de00daa55f7114bd4ce09465dd88074ece4 Gerrit-Change-Number: 65879 Gerrit-PatchSet: 25 Gerrit-Owner: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Reviewer: Simon Buhrow Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Simon Buhrow Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Comment-Date: Tue, 06 Sep 2022 09:16:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Thomas Heijligen <src(a)posteo.de> Comment-In-Reply-To: Aarya <aarya.chaumal(a)gmail.com> Gerrit-MessageType: comment

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[M] Change in flashrom[master]: flashrom.c:Add function to get a flattened view of the chip erase blocks
by Nico Huber (Code Review) 06 Sep '22

06 Sep '22

Attention is currently required from: Simon Buhrow, Thomas Heijligen, Aarya. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/65879 ) Change subject: flashrom.c:Add function to get a flattened view of the chip erase blocks ...................................................................... Patch Set 25: (1 comment) File flashrom.c: https://review.coreboot.org/c/flashrom/+/65879/comment/34d52482_e6b21c5f PS24, Line 1088: for (i = 0; i < NUM_ERASEFUNCTIONS; i++) { > But it will break at the first non-usable eraser, which could be the black listed one. Yeah, changing the for-loop's condition like this won't work. The body change should work. -- To view, visit https://review.coreboot.org/c/flashrom/+/65879 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iafe78de00daa55f7114bd4ce09465dd88074ece4 Gerrit-Change-Number: 65879 Gerrit-PatchSet: 25 Gerrit-Owner: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Reviewer: Simon Buhrow Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Simon Buhrow Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Comment-Date: Tue, 06 Sep 2022 08:42:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Thomas Heijligen <src(a)posteo.de> Comment-In-Reply-To: Aarya <aarya.chaumal(a)gmail.com> Gerrit-MessageType: comment

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[M] Change in flashrom[master]: spi.c: Move spi_get_erasefn_from_opcode to spi.c
by Aarya (Code Review) 06 Sep '22

06 Sep '22

Aarya has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/67368 ) Change subject: spi.c: Move spi_get_erasefn_from_opcode to spi.c ...................................................................... spi.c: Move spi_get_erasefn_from_opcode to spi.c Move spi_get_erasefn_from_opcode and spi_get_opcode_from_erasefn to spi.c. Change-Id: I3263b7642c35e7fd1da0002175123e5560d94752 Signed-off-by: Aarya Chaumal <aarya.chaumal(a)gmail.com> --- M spi.c M spi25.c 2 files changed, 58 insertions(+), 45 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/68/67368/1 diff --git a/spi.c b/spi.c index eeb1362..a5b1e2f 100644 --- a/spi.c +++ b/spi.c @@ -26,6 +26,51 @@ #include "programmer.h" #include "spi.h" +static const struct { + erasefunc_t *func; + uint8_t opcode; +} function_opcode_list[] = { + {&spi_block_erase_20, 0x20}, + {&spi_block_erase_21, 0x21}, + {&spi_block_erase_50, 0x50}, + {&spi_block_erase_52, 0x52}, + {&spi_block_erase_53, 0x53}, + {&spi_block_erase_5c, 0x5c}, + {&spi_block_erase_60, 0x60}, + {&spi_block_erase_62, 0x62}, + {&spi_block_erase_81, 0x81}, + {&spi_block_erase_c4, 0xc4}, + {&spi_block_erase_c7, 0xc7}, + {&spi_block_erase_d7, 0xd7}, + {&spi_block_erase_d8, 0xd8}, + {&spi_block_erase_db, 0xdb}, + {&spi_block_erase_dc, 0xdc}, +}; + +erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode) +{ + size_t i; + for (i = 0; i < ARRAY_SIZE(function_opcode_list); i++) { + if (function_opcode_list[i].opcode == opcode) + return function_opcode_list[i].func; + } + msg_cinfo("%s: unknown erase opcode (0x%02x). Please report " + "this at flashrom(a)flashrom.org\n", __func__, opcode); + return NULL; +} + +uint8_t spi_get_opcode_from_erasefn(erasefunc_t *func) +{ + size_t i; + for (i = 0; i < ARRAY_SIZE(function_opcode_list); i++) { + if (function_opcode_list[i].func == func) + return function_opcode_list[i].opcode; + } + msg_cinfo("%s: unknown erase function (0x%p). Please report " + "this at flashrom(a)flashrom.org\n", __func__, func); + return 0x00; //Assuming 0x00 is not a erase function opcode +} + int spi_send_command(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) diff --git a/spi25.c b/spi25.c index 4454106..c6ffe78 100644 --- a/spi25.c +++ b/spi25.c @@ -618,51 +618,6 @@ return spi_write_cmd(flash, 0xdc, true, addr, NULL, 0, 100 * 1000); } -static const struct { - erasefunc_t *func; - uint8_t opcode; -} function_opcode_list[] = { - {&spi_block_erase_20, 0x20}, - {&spi_block_erase_21, 0x21}, - {&spi_block_erase_50, 0x50}, - {&spi_block_erase_52, 0x52}, - {&spi_block_erase_53, 0x53}, - {&spi_block_erase_5c, 0x5c}, - {&spi_block_erase_60, 0x60}, - {&spi_block_erase_62, 0x62}, - {&spi_block_erase_81, 0x81}, - {&spi_block_erase_c4, 0xc4}, - {&spi_block_erase_c7, 0xc7}, - {&spi_block_erase_d7, 0xd7}, - {&spi_block_erase_d8, 0xd8}, - {&spi_block_erase_db, 0xdb}, - {&spi_block_erase_dc, 0xdc}, -}; - -erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode) -{ - size_t i; - for (i = 0; i < ARRAY_SIZE(function_opcode_list); i++) { - if (function_opcode_list[i].opcode == opcode) - return function_opcode_list[i].func; - } - msg_cinfo("%s: unknown erase opcode (0x%02x). Please report " - "this at flashrom(a)flashrom.org\n", __func__, opcode); - return NULL; -} - -uint8_t spi_get_opcode_from_erasefn(erasefunc_t *func) -{ - size_t i; - for (i = 0; i < ARRAY_SIZE(function_opcode_list); i++) { - if (function_opcode_list[i].func == func) - return function_opcode_list[i].opcode; - } - msg_cinfo("%s: unknown erase function (0x%p). Please report " - "this at flashrom(a)flashrom.org\n", __func__, func); - return 0x00; //Assuming 0x00 is not a erase function opcode -} - static int spi_nbyte_program(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len) { const bool native_4ba = flash->chip->feature_bits & FEATURE_4BA_WRITE && spi_master_4ba(flash); -- To view, visit https://review.coreboot.org/c/flashrom/+/67368 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I3263b7642c35e7fd1da0002175123e5560d94752 Gerrit-Change-Number: 67368 Gerrit-PatchSet: 1 Gerrit-Owner: Aarya <aarya.chaumal(a)gmail.com> Gerrit-MessageType: newchange

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flashrom-gerrit September 2022