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Change subject: writeprotect: add set_wp_range()
......................................................................
Patch Set 56: Code-Review+2
(1 comment)
File writeprotect.c:
https://review.coreboot.org/c/flashrom/+/58482/comment/dcc2aa31_6accdbeb
PS56, Line 325: so they it select
> There is some typo here, what does it mean to say?
I guess either "so they select" or "so it selects". The former seems more accurate.
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58481 )
Change subject: libflashrom,writeprotect: add flashrom_wp_get_available_ranges()
......................................................................
Patch Set 53: Code-Review+1
(7 comments)
Patchset:
PS53:
Ah, sorry, apparently I forgot to publish comments the last
time I looked ._.
File libflashrom.h:
https://review.coreboot.org/c/flashrom/+/58481/comment/fcccc7bd_4ba2a9a3
PS49, Line 153: range_list
Maybe abbreviate here and in the two functions below like above, i.e.
`ranges`?
https://review.coreboot.org/c/flashrom/+/58481/comment/9576828b_e70802af
PS49, Line 154: size_t
I would prefer `unsigned int` as `size_t` is officially for byte counts.
We use it internally sometimes for indices in general, but it seems
better to not have such local style in the API.
File libflashrom.c:
https://review.coreboot.org/c/flashrom/+/58481/comment/c53b32cf_e53d5790
PS49, Line 800: }
No need to change this if you don't want to. The pattern that seems
to prevail nowadays is to check for errors first and bail out, so
the actual code is at the end and doesn't need indentation, i.e.
if (index >= list->count)
return FLASHROM_WP_ERR_OTHER;
*start = ...
https://review.coreboot.org/c/flashrom/+/58481/comment/2b0a954f_2f3c1252
PS49, Line 811: free(list->ranges);
Better to check for NULL first, e.g.
if (!list)
return;
Then the caller doesn't need to ensure it's set. free() allows NULL and
it makes error paths easier to handle when one just needs to write
`free(x);` without needing to care if `x` was allocated already.
(flashrom_flash_release() doesn't follow that rule either, I'll push a patch CB:62340)
File writeprotect.c:
https://review.coreboot.org/c/flashrom/+/58481/comment/2fb0e985_9bbbb4d7
PS49, Line 171: Comparitor
Compar*a*tor
https://review.coreboot.org/c/flashrom/+/58481/comment/d664bd22_eae082f0
PS49, Line 200: size_t j = a->bits.bp_bit_count - i - 1;
Reversing the loop would be more readable, I guess:
for (int i = a->bits.bp_bit_count - 1; i >= 0; --i)
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Change subject: pcidev: Move pci_get_dev() logic into canonical place
......................................................................
Patch Set 4:
(1 comment)
File board_enable.c:
https://review.coreboot.org/c/flashrom/+/59276/comment/63c8f76a_99505f4f
PS3, Line 1097: dev = pcidev_clonedev(dev);
> Yes `pacc` is a handle scoped to libpci and so lexically scope to pcidev.c which is what this change is doing.
I see what your code is doing, but I don't know your reasoning. Are you just
following design patterns you have learned or did you think it through? how
should I know? That's why we have a mailing list where we can discuss such
design choices. If we don't discuss such things and the reasons are not 100%
obvious, another developer with a different opinion might accidently work
on reverting your changes in the future. I've seen this a lot in coreboot
btw. it's not just a figment.
Currently `pacc` is global yes. But as you well know we want to get rid of
global state. So eventually, `pacc` might just become another, locally known
parameter, like `dev` is to pci_read_long() etc. And I don't see (yet), that
we'd be wrapping every single libpci function in `pcidev.c`. That's not saying
that it's wrong to do so for some functions, I just think our reasoning should
be more subtle.
Also, after reading above paragraphs together again: Can we tell that this
change makes replacing the global `pacc` easier or harder? That's all things
a reviewer must consider when the direction is unclear.
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Change subject: pcidev: Move pci_get_dev() logic into canonical place
......................................................................
Patch Set 4:
(1 comment)
File board_enable.c:
https://review.coreboot.org/c/flashrom/+/59276/comment/baa6fcc1_6154cef6
PS3, Line 1097: dev = pcidev_clonedev(dev);
> The direction should be fairly clear, I rebased the follow on patches to give clarity. You realise every time you change your mind here I need to keep wasting time rebasing.
How you organize your patch trains is up to you. If constant rebasing is an
issue, then don't rebase constantly. Are you really making reviewers responsible
for necessary changes during review here? Can you please tell me in your
own words what is the point of reviews?
> Give actionable feedback, you wanted it renamed, then you changed your mind but agreed that 1 in the function name will do it now your comment is sort of high-Z.
Sorry, your patches look like you are spending little time to write them. So
please don't expect me to take much more time to write and repeat endless
explanations. I changed my mind because my original suggestion was based on
the idea that your original naming choice (pcidev_get_dev()) made sense which
it made little. I'll try to do better in the future and not to run into that
pitfall again.
> The change here is not particularly controversial, it is just isolating libpci stuff into pcidev.c which is pretty logical - look in pcidev.c for libpci stuff. So I don't know what you mean by "I have to look in another file", do you want the whole project in one file?
I fear, we are talking past each other. What I wanted to say is that before
this patch, when reading the code in `board_status.c` I could see what the
code does: it queries function 1 of the same PCI device. Now, after this
change, when reading the code in `board_status.c` I can't see that anymore
because the fact that it's about function 1 is hidden in another file. Putting
`function` in the API name could fix that. Other languages than C might not
have that problem, AFAIR you know Ada: There you could just write that parameter
name in the call e.g. `pcidev_getdev(dev, function => 1)`. But in C all we can do
is to choose good function and variable names. (Or add code comments, but I
kind of hate those (not checked by the compiler.))
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Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/61854 )
Change subject: ichspi.c: Check SPI Cycle In-Progress prior start HW Seq
......................................................................
Patch Set 12:
(1 comment)
Commit Message:
https://review.coreboot.org/c/flashrom/+/61854/comment/4eeb4c35_0620f182
PS11, Line 18: AU
> nit: What does this mean? I wouldn't use an acronym here.
Ack
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Hello build bot (Jenkins), Patrick Georgi, Stefan Reinauer, Rizwan Qureshi, Angel Pons, Sridhar Siricilla, Alex Levin, YH Lin, Nico Huber, Martin Roth - Personal, Caveh Jalali, Tim Wawrzynczak, Edward O'Callaghan, Nick Vaccaro, Boris Mittelberg,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/61854
to look at the new patch set (#12).
Change subject: ichspi.c: Check SPI Cycle In-Progress prior start HW Seq
......................................................................
ichspi.c: Check SPI Cycle In-Progress prior start HW Seq
As per EDS, SPI controller sets the HSFSTS.bit5 (SCIP) when software
sets the Flash Cycle Go (FGO) bit in the Hardware Sequencing Flash
Control register.
This bit remains set until the cycle completes on the SPI interface.
Hardware automatically sets and clears this bit. Software must initiate
the next SPI transaction when this bit is 0.
Problem Statement:
Evidencing AU (Auto Update) failure while performing firmware update on
the Alder Lake based ChromeOS devices.
Observation:
Based on the initial understanding from the failure log/pattern, it
seems like the platform is evidencing multiple `flashrom` access from
different source, for example: `futility` accesses flashrom for erase,
write and read operation, `crossystem` uses flashrom for updating VBNV,
additionally, `set_fw_good` script also uses `crossystem` to update the
fw status.
Solution:
Without this SCIP check being implemented in flashrom, there is no
way to ensure multiple instances of flashrom performing different SPI
operations are not cancelling each other and running into below error:
Erasing and writing flash chip... Timeout error between offset
0x0061c000 and 0x0061c03f (= 0x0061c000 + 63)! FAILED!
Uh oh. Erase/write failed. Checking if anything has changed.
TEST=Able to flash coreboot image on Alder Lake Brya variants, Tiger
Lake Volteer variants and Comet Lake Hatch variants without any failure.
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: Ib9265cc20513fd00f32f8fa22e28c312903ca484
---
M ichspi.c
1 file changed, 15 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/54/61854/12
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