flashrom-gerrit January 2020

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Change in flashrom[master]: treewide: Use C-style comments on some files
by Angel Pons (Code Review) 03 Feb '20

03 Feb '20

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/38660 ) Change subject: treewide: Use C-style comments on some files ...................................................................... treewide: Use C-style comments on some files On some files, most comments are C-style except for a few outliers. Change-Id: I74102108ef4b0365a9bf0fea20f012aece201892 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M 82802ab.c M flashrom.c M hwaccess.c M layout.c M os.h M physmap.c M platform.h M rayer_spi.c 8 files changed, 35 insertions(+), 35 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/60/38660/1 diff --git a/82802ab.c b/82802ab.c index 281b66e..a44a66e 100644 --- a/82802ab.c +++ b/82802ab.c @@ -89,7 +89,7 @@ chipaddr bios = flash->virtual_memory; chip_writeb(flash, 0x70, bios); - if ((chip_readb(flash, bios) & 0x80) == 0) { // it's busy + if ((chip_readb(flash, bios) & 0x80) == 0) { /* it's busy */ while ((chip_readb(flash, bios) & 0x80) == 0) ; } @@ -107,15 +107,15 @@ chipaddr bios = flash->virtual_memory; uint8_t status; - // clear status register + /* clear status register */ chip_writeb(flash, 0x50, bios + page); - // now start it + /* now start it */ chip_writeb(flash, 0x20, bios + page); chip_writeb(flash, 0xd0, bios + page); programmer_delay(10); - // now let's see what the register is + /* now let's see what the register is */ status = wait_82802ab(flash); print_status_82802ab(status); @@ -164,7 +164,7 @@ /* Read block lock-bits */ for (i = 0; i < flash->chip->total_size * 1024; i+= (64 * 1024)) { - bcfg = chip_readb(flash, bios + i + 2); // read block lock config + bcfg = chip_readb(flash, bios + i + 2); /* read block lock config */ msg_cdbg("block lock at %06x is %slocked!\n", i, bcfg ? "" : "un"); if (bcfg) { need_unlock = 1; diff --git a/flashrom.c b/flashrom.c index e540027..2bc1d54 100644 --- a/flashrom.c +++ b/flashrom.c @@ -452,7 +452,7 @@ #if CONFIG_NI845X_SPI == 1 { .name = "ni845x_spi", - .type = OTHER, // choose other because NI-845x uses own USB implementation + .type = OTHER, /* choose other because NI-845x uses own USB implementation */ .devs.note = "National Instruments USB-845x\n", .init = ni845x_spi_init, .map_flash_region = fallback_map, @@ -1324,7 +1324,7 @@ msg_gerr("Error: flushing file \"%s\" failed: %s\n", filename, strerror(errno)); ret = 1; } - // Try to fsync() only regular files and if that function is available at all (e.g. not on MinGW). + /* Try to fsync() only regular files and if that function is available at all (e.g. not on MinGW). */ #if defined(_POSIX_FSYNC) && (_POSIX_FSYNC != -1) struct stat image_stat; if (fstat(fileno(image), &image_stat) != 0) { @@ -1466,7 +1466,7 @@ "eraseblock layout is not defined. "); return 1; } - // TODO: Once erase functions are annotated with allowed buses, check that as well. + /* TODO: Once erase functions are annotated with allowed buses, check that as well. */ return 0; } diff --git a/hwaccess.c b/hwaccess.c index 48ccb34..0639d55 100644 --- a/hwaccess.c +++ b/hwaccess.c @@ -70,7 +70,7 @@ * * See also https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Docume… */ -#if IS_PPC // cf. http://lxr.free-electrons.com/source/arch/powerpc/include/asm/barrier.h +#if IS_PPC /* cf. http://lxr.free-electrons.com/source/arch/powerpc/include/asm/barrier.h */ asm("eieio" : : : "memory"); #elif IS_SPARC #if defined(__sparc_v9__) || defined(__sparcv9) diff --git a/layout.c b/layout.c index d80b01f..44ea667 100644 --- a/layout.c +++ b/layout.c @@ -68,7 +68,7 @@ if (2 != fscanf(romlayout, "%255s %255s\n", tempstr, tempname)) continue; #if 0 - // fscanf does not like arbitrary comments like that :( later + /* fscanf does not like arbitrary comments like that :( later */ if (tempstr[0] == '#') { continue; } diff --git a/os.h b/os.h index ddfa46b..1409d96 100644 --- a/os.h +++ b/os.h @@ -19,45 +19,45 @@ #include "platform.h" -// Solaris +/* Solaris */ #if defined (__sun) && (defined(__i386) || defined(__amd64)) #define __FLASHROM_OS__ "SunOS" -// OS X +/* OS X */ #elif defined(__MACH__) && defined(__APPLE__) #define __FLASHROM_OS__ "Darwin" -// FreeBSD +/* FreeBSD */ #elif defined(__FreeBSD__) #define __FLASHROM_OS__ "FreeBSD" -// FreeBSD with glibc-based userspace (e.g. Debian/kFreeBSD) +/* FreeBSD with glibc-based userspace (e.g. Debian/kFreeBSD) */ #elif defined(__FreeBSD_kernel__) && defined(__GLIBC__) #define __FLASHROM_OS__ "FreeBSD-glibc" -// DragonFlyBSD +/* DragonFlyBSD */ #elif defined(__DragonFly__) #define __FLASHROM_OS__ "DragonFlyBSD" -// NetBSD +/* NetBSD */ #elif defined(__NetBSD__) #define __FLASHROM_OS__ "NetBSD" -// OpenBSD +/* OpenBSD */ #elif defined(__OpenBSD__) #define __FLASHROM_OS__ "OpenBSD" -// DJGPP +/* DJGPP */ #elif defined(__DJGPP__) #define __FLASHROM_OS__ "DOS" -// MinGW (always has _WIN32 available) +/* MinGW (always has _WIN32 available) */ #elif defined(__MINGW32__) #define __FLASHROM_OS__ "MinGW" -// Cygwin (usually without _WIN32) +/* Cygwin (usually without _WIN32) */ #elif defined( __CYGWIN__) #define __FLASHROM_OS__ "Cygwin" -// libpayload +/* libpayload */ #elif defined(__LIBPAYLOAD__) #define __FLASHROM_OS__ "libpayload" -// GNU Hurd +/* GNU Hurd */ #elif defined(__gnu_hurd__) #define __FLASHROM_OS__ "Hurd" -// Linux +/* Linux */ #elif defined(__linux__) - // There are various flags in use on Android apparently. __ANDROID__ seems to be the most trustworthy. + /* There are various flags in use on Android apparently. __ANDROID__ seems to be the most trustworthy. */ #if defined(__ANDROID__) #define __FLASHROM_OS__ "Android" #else diff --git a/physmap.c b/physmap.c index 72d5899..a5cfc0d 100644 --- a/physmap.c +++ b/physmap.c @@ -397,7 +397,7 @@ } if (errno != EIO) { - // A severe error. + /* A severe error. */ msg_perr("Could not read() MSR: %s\n", strerror(errno)); close(fd_msr); exit(1); @@ -628,13 +628,13 @@ /* rdmsr() and wrmsr() are provided by DirectHW which needs neither setup nor cleanup. */ int setup_cpu_msr(int cpu) { - // Always succeed for now + /* Always succeed for now */ return 0; } void cleanup_cpu_msr(void) { - // Nothing, yet. + /* Nothing, yet. */ } #elif defined(__LIBPAYLOAD__) msr_t libpayload_rdmsr(int addr) @@ -682,10 +682,10 @@ void cleanup_cpu_msr(void) { - // Nothing, yet. + /* Nothing, yet. */ } -#endif // OS switches for MSR code -#else // x86 +#endif /* OS switches for MSR code */ +#else /* x86 */ /* Does MSR exist on non-x86 architectures? */ -#endif // arch switches for MSR code -#endif // CONFIG_INTERNAL == 1 +#endif /* arch switches for MSR code */ +#endif /* CONFIG_INTERNAL == 1 */ diff --git a/platform.h b/platform.h index 751957c..f3970be 100644 --- a/platform.h +++ b/platform.h @@ -20,7 +20,7 @@ #ifndef __PLATFORM_H__ #define __PLATFORM_H__ 1 -// Helper defines for operating systems +/* Helper defines for operating systems */ #if defined(__gnu_linux__) || defined(__linux__) #define IS_LINUX 1 #else @@ -37,7 +37,7 @@ #define IS_WINDOWS 0 #endif -// Likewise for target architectures +/* Likewise for target architectures */ #if defined (__i386__) || defined (__x86_64__) || defined(__amd64__) #define __FLASHROM_ARCH__ "x86" #define IS_X86 1 diff --git a/rayer_spi.c b/rayer_spi.c index 8e869e6..27169b6 100644 --- a/rayer_spi.c +++ b/rayer_spi.c @@ -151,7 +151,7 @@ { uint8_t tmp; - tmp = INB(lpt_iobase + 1) ^ 0x80; // bit.7 inverted + tmp = INB(lpt_iobase + 1) ^ 0x80; /* bit.7 inverted */ tmp = (tmp >> pinout->miso_bit) & 0x1; return tmp; } -- To view, visit https://review.coreboot.org/c/flashrom/+/38660 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I74102108ef4b0365a9bf0fea20f012aece201892 Gerrit-Change-Number: 38660 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

3 6

Change in flashrom[master]: Fix building with meson, again
by Angel Pons (Code Review) 01 Feb '20

01 Feb '20

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/38659 ) Change subject: Fix building with meson, again ...................................................................... Fix building with meson, again Change-Id: Iea40da587729f3975a8901d3933e7567805242c5 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M meson_options.txt 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/59/38659/1 diff --git a/meson_options.txt b/meson_options.txt index b7633d0..ea87311 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -33,3 +33,4 @@ option('config_satasii', type : 'boolean', value : true, description : 'SiI SATA controllers') option('config_serprog', type : 'boolean', value : true, description : 'serprog') option('config_usbblaster_spi', type : 'boolean', value : true, description : 'Altera USB-Blaster dongles') +option('config_stlinkv3_spi', type : 'boolean', value : true, description : 'STMicroelectronics STLINK-V3') -- To view, visit https://review.coreboot.org/c/flashrom/+/38659 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iea40da587729f3975a8901d3933e7567805242c5 Gerrit-Change-Number: 38659 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

5 8

Change in flashrom[master]: chipset_enable: Add Kaby Lake U Prem. to known and tested systems
by Wim Vervoorn (Code Review) 22 Jan '20

22 Jan '20

Wim Vervoorn has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/38481 ) Change subject: chipset_enable: Add Kaby Lake U Prem. to known and tested systems ...................................................................... chipset_enable: Add Kaby Lake U Prem. to known and tested systems Intel Kaby Lake U (with the 9d4e device id) is available but marked not tested. This device was tested on the Facebook Monolith system with the Intel i3 7100U SoC. Signed-off-by: Wim Vervoorn <wvervoorn(a)eltan.com> Change-Id: Ie35cc896e29baffa63fe9e37c14770001b54e7ec --- M chipset_enable.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/81/38481/1 diff --git a/chipset_enable.c b/chipset_enable.c index e826d90..3b44d93 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1989,7 +1989,7 @@ {0x8086, 0x9d46, B_S, NT, "Intel", "Skylake Y Premium", enable_flash_pch100}, {0x8086, 0x9d48, B_S, NT, "Intel", "Skylake U Premium", enable_flash_pch100}, {0x8086, 0x9d4b, B_S, NT, "Intel", "Kaby Lake Y w/ iHDCP2.2 Prem.", enable_flash_pch100}, - {0x8086, 0x9d4e, B_S, NT, "Intel", "Kaby Lake U w/ iHDCP2.2 Prem.", enable_flash_pch100}, + {0x8086, 0x9d4e, B_S, DEP, "Intel", "Kaby Lake U w/ iHDCP2.2 Prem.", enable_flash_pch100}, {0x8086, 0x9d50, B_S, NT, "Intel", "Kaby Lake U w/ iHDCP2.2 Base", enable_flash_pch100}, {0x8086, 0x9d51, B_S, NT, "Intel", "Kabe Lake w/ iHDCP2.2 Sample", enable_flash_pch100}, {0x8086, 0x9d53, B_S, NT, "Intel", "Kaby Lake U Base", enable_flash_pch100}, -- To view, visit https://review.coreboot.org/c/flashrom/+/38481 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie35cc896e29baffa63fe9e37c14770001b54e7ec Gerrit-Change-Number: 38481 Gerrit-PatchSet: 1 Gerrit-Owner: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-MessageType: newchange

4 9

Change in flashrom[master]: Fix typos
by Carl-Daniel Hailfinger (Code Review) 20 Jan '20

20 Jan '20

Carl-Daniel Hailfinger has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/38477 ) Change subject: Fix typos ...................................................................... Fix typos Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Change-Id: Ia5ed00c488b0719b2bdd6c8f304900511684f445 --- M atavia.c M flashchips.h 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/38477/1 diff --git a/atavia.c b/atavia.c index fdaaa74..b407a30 100644 --- a/atavia.c +++ b/atavia.c @@ -142,7 +142,7 @@ if (rget_io_perms()) return 1; - dev = pcidev_init(ata_via, PCI_ROM_ADDRESS); /* Acutally no BAR setup needed at all. */ + dev = pcidev_init(ata_via, PCI_ROM_ADDRESS); /* Actually no BAR setup needed at all. */ if (!dev) return 1; diff --git a/flashchips.h b/flashchips.h index f02958c..14ab6de 100644 --- a/flashchips.h +++ b/flashchips.h @@ -602,7 +602,7 @@ #define PMC_PM49FL004 0x6E /* - * The Sanyo chip found so far uses SPI, first byte is manufacture code, + * The Sanyo chip found so far uses SPI, first byte is manufacturer code, * second byte is the device code, * third byte is a dummy byte. */ -- To view, visit https://review.coreboot.org/c/flashrom/+/38477 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ia5ed00c488b0719b2bdd6c8f304900511684f445 Gerrit-Change-Number: 38477 Gerrit-PatchSet: 1 Gerrit-Owner: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Gerrit-MessageType: newchange

3 3

Change in flashrom[master]: Revert "pcidev.c: Factor out pcidev_validate() into pure fn"
by Nico Huber (Code Review) 20 Jan '20

20 Jan '20

Hello Edward O'Callaghan, Arthur Heymans, build bot (Jenkins), Patrick Georgi, I'd like you to do a code review. Please visit https://review.coreboot.org/c/flashrom/+/38319 to review the following change. Change subject: Revert "pcidev.c: Factor out pcidev_validate() into pure fn" ...................................................................... Revert "pcidev.c: Factor out pcidev_validate() into pure fn" This reverts commit e28d75ed7204d7fac2c0fac13978098530b0574e. This is broken in multiple ways, e.g. pcidev_init() can only return NULL. Change-Id: I06242147ba9d3a062d442f645eb0800ef51af19f Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M pcidev.c 1 file changed, 24 insertions(+), 29 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/19/38319/1 diff --git a/pcidev.c b/pcidev.c index 4012840..54c1fd3 100644 --- a/pcidev.c +++ b/pcidev.c @@ -148,33 +148,6 @@ return (uintptr_t)addr; } -static uintptr_t pcidev_validate(struct pci_dev *dev, int bar, const struct dev_entry *devs) -{ - unsigned i; - - /* Check against list of supported devices. */ - for (i = 0; devs[i].device_name != NULL; i++) { - if (dev->device_id != devs[i].device_id) - continue; - - msg_pinfo("Found \"%s %s\" (%04x:%04x, BDF %02x:%02x.%x).\n", - devs[i].vendor_name, devs[i].device_name, - dev->vendor_id, dev->device_id, dev->bus, dev->dev, - dev->func); - - if (devs[i].status == NT) - msg_pinfo("===\nThis PCI device is UNTESTED. Please report the 'flashrom -p " - "xxxx' output\n" - "to flashrom(a)flashrom.org if it works for you. Please add the name " - "of your\n" - "PCI device to the subject. Thank you for your help!\n===\n"); - - - return pcidev_readbar(dev, bar); - } - return 0; -} - static int pcidev_shutdown(void *data) { if (pacc == NULL) { @@ -210,10 +183,12 @@ struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar) { struct pci_dev *dev; + struct pci_dev *found_dev = NULL; struct pci_filter filter; char *pcidev_bdf; char *msg = NULL; int found = 0; + int i; uintptr_t addr = 0; if (pci_init_common() != 0) @@ -232,10 +207,30 @@ for (dev = pacc->devices; dev; dev = dev->next) { if (pci_filter_match(&filter, dev)) { + /* Check against list of supported devices. */ + for (i = 0; devs[i].device_name != NULL; i++) + if ((dev->vendor_id == devs[i].vendor_id) && + (dev->device_id == devs[i].device_id)) + break; + /* Not supported, try the next one. */ + if (devs[i].device_name == NULL) + continue; + + msg_pdbg("Found \"%s %s\" (%04x:%04x, BDF %02x:%02x.%x).\n", devs[i].vendor_name, + devs[i].device_name, dev->vendor_id, dev->device_id, dev->bus, dev->dev, + dev->func); + if (devs[i].status == NT) + msg_pinfo("===\nThis PCI device is UNTESTED. Please report the 'flashrom -p " + "xxxx' output\n" + "to flashrom(a)flashrom.org if it works for you. Please add the name " + "of your\n" + "PCI device to the subject. Thank you for your help!\n===\n"); + /* FIXME: We should count all matching devices, not * just those with a valid BAR. */ - if ((addr = pcidev_validate(dev, bar, devs)) != 0) { + if ((addr = pcidev_readbar(dev, bar)) != 0) { + found_dev = dev; found++; } } @@ -251,7 +246,7 @@ return NULL; } - return dev; + return found_dev; } enum pci_write_type { -- To view, visit https://review.coreboot.org/c/flashrom/+/38319 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I06242147ba9d3a062d442f645eb0800ef51af19f Gerrit-Change-Number: 38319 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newchange

3 5

Change in flashrom[master]: pcidev.c: Factor out pcidev_validate() into pure fn
by Edward O'Callaghan (Code Review) 18 Jan '20

18 Jan '20

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/37264 ) Change subject: pcidev.c: Factor out pcidev_validate() into pure fn ...................................................................... pcidev.c: Factor out pcidev_validate() into pure fn This makes writing unit-tests easier. Change-Id: Ia2718f1f40851d3122741cd0e50b0c2b647b727a Signed-off-by: Edward O'Callaghan <quasisec(a)chromium.org> --- M pcidev.c 1 file changed, 29 insertions(+), 24 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/64/37264/1 diff --git a/pcidev.c b/pcidev.c index 54c1fd3..4012840 100644 --- a/pcidev.c +++ b/pcidev.c @@ -148,6 +148,33 @@ return (uintptr_t)addr; } +static uintptr_t pcidev_validate(struct pci_dev *dev, int bar, const struct dev_entry *devs) +{ + unsigned i; + + /* Check against list of supported devices. */ + for (i = 0; devs[i].device_name != NULL; i++) { + if (dev->device_id != devs[i].device_id) + continue; + + msg_pinfo("Found \"%s %s\" (%04x:%04x, BDF %02x:%02x.%x).\n", + devs[i].vendor_name, devs[i].device_name, + dev->vendor_id, dev->device_id, dev->bus, dev->dev, + dev->func); + + if (devs[i].status == NT) + msg_pinfo("===\nThis PCI device is UNTESTED. Please report the 'flashrom -p " + "xxxx' output\n" + "to flashrom(a)flashrom.org if it works for you. Please add the name " + "of your\n" + "PCI device to the subject. Thank you for your help!\n===\n"); + + + return pcidev_readbar(dev, bar); + } + return 0; +} + static int pcidev_shutdown(void *data) { if (pacc == NULL) { @@ -183,12 +210,10 @@ struct pci_dev *pcidev_init(const struct dev_entry *devs, int bar) { struct pci_dev *dev; - struct pci_dev *found_dev = NULL; struct pci_filter filter; char *pcidev_bdf; char *msg = NULL; int found = 0; - int i; uintptr_t addr = 0; if (pci_init_common() != 0) @@ -207,30 +232,10 @@ for (dev = pacc->devices; dev; dev = dev->next) { if (pci_filter_match(&filter, dev)) { - /* Check against list of supported devices. */ - for (i = 0; devs[i].device_name != NULL; i++) - if ((dev->vendor_id == devs[i].vendor_id) && - (dev->device_id == devs[i].device_id)) - break; - /* Not supported, try the next one. */ - if (devs[i].device_name == NULL) - continue; - - msg_pdbg("Found \"%s %s\" (%04x:%04x, BDF %02x:%02x.%x).\n", devs[i].vendor_name, - devs[i].device_name, dev->vendor_id, dev->device_id, dev->bus, dev->dev, - dev->func); - if (devs[i].status == NT) - msg_pinfo("===\nThis PCI device is UNTESTED. Please report the 'flashrom -p " - "xxxx' output\n" - "to flashrom(a)flashrom.org if it works for you. Please add the name " - "of your\n" - "PCI device to the subject. Thank you for your help!\n===\n"); - /* FIXME: We should count all matching devices, not * just those with a valid BAR. */ - if ((addr = pcidev_readbar(dev, bar)) != 0) { - found_dev = dev; + if ((addr = pcidev_validate(dev, bar, devs)) != 0) { found++; } } @@ -246,7 +251,7 @@ return NULL; } - return found_dev; + return dev; } enum pci_write_type { -- To view, visit https://review.coreboot.org/c/flashrom/+/37264 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ia2718f1f40851d3122741cd0e50b0c2b647b727a Gerrit-Change-Number: 37264 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

3 4

Change in flashrom[master]: raiden_debug: Add missing .write_aai cb fn
by Edward O'Callaghan (Code Review) 18 Jan '20

18 Jan '20

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/38223 ) Change subject: raiden_debug: Add missing .write_aai cb fn ...................................................................... raiden_debug: Add missing .write_aai cb fn Change-Id: I97d26e7d1f59593d0b85dcea539e70773e0aa513 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M raiden_debug_spi.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/23/38223/1 diff --git a/raiden_debug_spi.c b/raiden_debug_spi.c index 9af0f7d..8080a3f 100644 --- a/raiden_debug_spi.c +++ b/raiden_debug_spi.c @@ -168,6 +168,7 @@ .multicommand = default_spi_send_multicommand, .read = default_spi_read, .write_256 = default_spi_write_256, + .write_aai = default_spi_write_aai, }; static int match_endpoint(struct libusb_endpoint_descriptor const *descriptor, -- To view, visit https://review.coreboot.org/c/flashrom/+/38223 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I97d26e7d1f59593d0b85dcea539e70773e0aa513 Gerrit-Change-Number: 38223 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

3 4

Change in flashrom[master]: stlinkv3_spi: Move a declaration out of for-loop head
by Nico Huber (Code Review) 02 Jan '20

02 Jan '20

Hello Angel Pons, Miklós Márton, David Hendricks, I'd like you to do a code review. Please visit https://review.coreboot.org/c/flashrom/+/38034 to review the following change. Change subject: stlinkv3_spi: Move a declaration out of for-loop head ...................................................................... stlinkv3_spi: Move a declaration out of for-loop head GCC 4.8 wants an explicit `-std=c99` or something for this to work. It seems easier to keep the common declaration style. Change-Id: Ic0819f82169df4d66cc949494229b0749c06e8f6 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M stlinkv3_spi.c 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/34/38034/1 diff --git a/stlinkv3_spi.c b/stlinkv3_spi.c index 02e87bc..7338911 100644 --- a/stlinkv3_spi.c +++ b/stlinkv3_spi.c @@ -333,6 +333,7 @@ int rc = 0; int actual_length = 0; uint32_t rw_status = 0; + unsigned int i; if (stlinkv3_spi_set_SPI_NSS(SPI_NSS_LOW)) { msg_perr("Failed to set the NSS pin to low\n"); @@ -346,7 +347,7 @@ command[2] = (uint8_t)write_cnt; command[3] = (uint8_t)(write_cnt >> 8); - for (unsigned int i = 0; (i < 8) && (i < write_cnt); i++) + for (i = 0; (i < 8) && (i < write_cnt); i++) command[4+i] = write_arr[i]; rc = libusb_bulk_transfer(stlinkv3_handle, STLINK_EP_OUT, -- To view, visit https://review.coreboot.org/c/flashrom/+/38034 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ic0819f82169df4d66cc949494229b0749c06e8f6 Gerrit-Change-Number: 38034 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-MessageType: newchange

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