flashrom-gerrit April 2019

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Change in ...flashrom[master]: dediprog: Enable 4BA support for SF600, protocol V2
by David Hendricks (Code Review) 15 Apr '19

15 Apr '19

David Hendricks has submitted this change and it was merged. ( https://review.coreboot.org/c/flashrom/+/28804 ) Change subject: dediprog: Enable 4BA support for SF600, protocol V2 ...................................................................... dediprog: Enable 4BA support for SF600, protocol V2 The only combination we could successfully test so far is the SF600 with protocol version V2 (firmware 7.2.21) and native 4BA commands. Let's enable that at least. Change-Id: I665d0806aec469a3509620a760815861fbe22841 Signed-off-by: Nico Huber <nico.h(a)gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/28804 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: David Hendricks <david.hendricks(a)gmail.com> --- M dediprog.c M spi.h 2 files changed, 28 insertions(+), 8 deletions(-) Approvals: build bot (Jenkins): Verified David Hendricks: Looks good to me, approved diff --git a/dediprog.c b/dediprog.c index c99c922..03675e5 100644 --- a/dediprog.c +++ b/dediprog.c @@ -360,8 +360,9 @@ return 0; } -static void fill_rw_cmd_payload(uint8_t *data_packet, unsigned int count, uint8_t dedi_spi_cmd, - unsigned int *value, unsigned int *idx, unsigned int start, int is_read) { +static void prepare_rw_cmd( + struct flashctx *const flash, uint8_t *data_packet, unsigned int count, + uint8_t dedi_spi_cmd, unsigned int *value, unsigned int *idx, unsigned int start, int is_read) { /* First 5 bytes are common in both generations. */ data_packet[0] = count & 0xff; data_packet[1] = (count >> 8) & 0xff; @@ -370,6 +371,15 @@ data_packet[4] = 0; /* "Opcode". Specs imply necessity only for READ_MODE_4B_ADDR_FAST and WRITE_MODE_4B_ADDR_256B_PAGE_PGM */ if (protocol() >= PROTOCOL_V2) { + if (is_read && flash->chip->feature_bits & FEATURE_4BA_FAST_READ) { + data_packet[3] = READ_MODE_4B_ADDR_FAST_0x0C; + data_packet[4] = JEDEC_READ_4BA_FAST; + } else if (dedi_spi_cmd == WRITE_MODE_PAGE_PGM + && (flash->chip->feature_bits & FEATURE_4BA_WRITE)) { + data_packet[3] = WRITE_MODE_4B_ADDR_256B_PAGE_PGM_0x12; + data_packet[4] = JEDEC_BYTE_PROGRAM_4BA; + } + *value = *idx = 0; data_packet[5] = 0; /* RFU */ data_packet[6] = (start >> 0) & 0xff; @@ -438,7 +448,7 @@ uint8_t data_packet[command_packet_size]; unsigned int value, idx; - fill_rw_cmd_payload(data_packet, count, READ_MODE_STD, &value, &idx, start, 1); + prepare_rw_cmd(flash, data_packet, count, READ_MODE_STD, &value, &idx, start, 1); int ret = dediprog_write(CMD_READ, value, idx, data_packet, sizeof(data_packet)); if (ret != sizeof(data_packet)) { @@ -594,7 +604,7 @@ uint8_t data_packet[command_packet_size]; unsigned int value, idx; - fill_rw_cmd_payload(data_packet, count, dedi_spi_cmd, &value, &idx, start, 0); + prepare_rw_cmd(flash, data_packet, count, dedi_spi_cmd, &value, &idx, start, 0); int ret = dediprog_write(CMD_WRITE, value, idx, data_packet, sizeof(data_packet)); if (ret != sizeof(data_packet)) { msg_perr("Command Write SPI Bulk failed, %s!\n", libusb_error_name(ret)); @@ -638,8 +648,8 @@ if (residue) { msg_pdbg("Slow write for partial block from 0x%x, length 0x%x\n", start, residue); - /* No idea about the real limit. Maybe 12, maybe more. */ - ret = spi_write_chunked(flash, buf, start, residue, 12); + /* No idea about the real limit. Maybe 16 including command and address, maybe more. */ + ret = spi_write_chunked(flash, buf, start, residue, 11); if (ret) { dediprog_set_leds(LED_ERROR); return ret; @@ -659,7 +669,7 @@ msg_pdbg("Slow write for partial block from 0x%x, length 0x%x\n", start, len); ret = spi_write_chunked(flash, buf + residue + bulklen, - start + residue + bulklen, len, 12); + start + residue + bulklen, len, 11); if (ret) { dediprog_set_leds(LED_ERROR); return ret; @@ -931,7 +941,7 @@ return millivolt; } -static const struct spi_master spi_master_dediprog = { +static struct spi_master spi_master_dediprog = { .type = SPI_CONTROLLER_DEDIPROG, .features = SPI_MASTER_NO_4BA_MODES, .max_data_read = 16, /* 18 seems to work fine as well, but 19 times out sometimes with FW 5.15. */ @@ -1124,6 +1134,9 @@ if (dediprog_standalone_mode()) return 1; + if (dediprog_devicetype == DEV_SF600 && protocol() == PROTOCOL_V2) + spi_master_dediprog.features |= SPI_MASTER_4BA; + if (register_spi_master(&spi_master_dediprog) || dediprog_set_leds(LED_NONE)) return 1; diff --git a/spi.h b/spi.h index 422e6a0..0073c71 100644 --- a/spi.h +++ b/spi.h @@ -151,6 +151,9 @@ #define JEDEC_READ_OUTSIZE 0x04 /* JEDEC_READ_INSIZE : any length */ +/* Read the memory (with delay after sending address) */ +#define JEDEC_READ_FAST 0x0b + /* Write memory byte */ #define JEDEC_BYTE_PROGRAM 0x02 #define JEDEC_BYTE_PROGRAM_OUTSIZE 0x05 @@ -166,6 +169,10 @@ From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */ #define JEDEC_READ_4BA 0x13 +/* Read the memory with 4-byte address (and delay after sending address) + From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */ +#define JEDEC_READ_4BA_FAST 0x0c + /* Write memory byte with 4-byte address From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */ #define JEDEC_BYTE_PROGRAM_4BA 0x12 -- To view, visit https://review.coreboot.org/c/flashrom/+/28804 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I665d0806aec469a3509620a760815861fbe22841 Gerrit-Change-Number: 28804 Gerrit-PatchSet: 7 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: ron minnich <rminnich(a)gmail.com> Gerrit-MessageType: merged

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Change in ...flashrom[master]: dediprog: Enable 4BA support for SF600, protocol V2
by David Hendricks (Code Review) 15 Apr '19

15 Apr '19

David Hendricks has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/28804 ) Change subject: dediprog: Enable 4BA support for SF600, protocol V2 ...................................................................... Patch Set 6: "patches don't age like wine" - ron -- To view, visit https://review.coreboot.org/c/flashrom/+/28804 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I665d0806aec469a3509620a760815861fbe22841 Gerrit-Change-Number: 28804 Gerrit-PatchSet: 6 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: ron minnich <rminnich(a)gmail.com> Gerrit-Comment-Date: Mon, 15 Apr 2019 18:44:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...flashrom[master]: Add support for the meson build system
by Richard Hughes (Code Review) 02 Apr '19

02 Apr '19

Richard Hughes has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/31248 Change subject: Add support for the meson build system ...................................................................... Add support for the meson build system The fwupd project has to build in all kinds of crazy targets, e.g. for odd endians, odd instruction sets, and in odd ways, e.g. installing with a prefix of /app for projects like flatpak. We also have other "robustness" guarantees and therefore have a comprehensive set of CI tests which enable a lot of warning flags and run linting and static analysis code like Coverity. Rather than hack the Makefile I ported the codebase to use Meson. Meson is a(nother) next-generation build system used by a lot of open source projects ranging from low level libraries to desktop software. As part of the port, I also copied the CONFIG_ logic from the makefile, e.g. Option Current Value Possible Values Description ------ ------------- --------------- ----------- config_atahpt false [true, false] Highpoint (HPT) ATA/RAID controllers config_atapromise false [true, false] Promise ATA controller config_atavia true [true, false] VIA VT6421A LPC memory ... At the moment I'm using the meson port so I can include flashrom as a subproject to fwupd as distros are not yet shipping libflashrom as a shared library. Change-Id: I3d950ece2a0568c09985eab47ddab9df1d0c43a2 Signed-off-by: Richard Hughes <richard(a)hughsie.com> --- A libflashrom.map A meson.build A meson_options.txt A util/ich_descriptors_tool/meson.build A util/meson.build 5 files changed, 466 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/48/31248/1 diff --git a/libflashrom.map b/libflashrom.map new file mode 100644 index 0000000..3c287ff --- /dev/null +++ b/libflashrom.map @@ -0,0 +1,24 @@ +LIBFLASHROM_1.0 { + global: + flashrom_flag_get; + flashrom_flag_set; + flashrom_flash_erase; + flashrom_flash_getsize; + flashrom_flash_probe; + flashrom_flash_release; + flashrom_image_read; + flashrom_image_verify; + flashrom_image_write; + flashrom_init; + flashrom_layout_include_region; + flashrom_layout_read_fmap_from_buffer; + flashrom_layout_read_fmap_from_rom; + flashrom_layout_read_from_ifd; + flashrom_layout_release; + flashrom_layout_set; + flashrom_programmer_init; + flashrom_programmer_shutdown; + flashrom_set_log_callback; + flashrom_shutdown; + local: *; +}; diff --git a/meson.build b/meson.build new file mode 100644 index 0000000..c21e935 --- /dev/null +++ b/meson.build @@ -0,0 +1,392 @@ +project('flashromutils', 'c', + version : '1.0', + license : 'GPL-2.0+', + meson_version : '>=0.47.0', + default_options : ['warning_level=2', 'c_std=c99'], +) + +# libtool versioning +lt_current = '1' +lt_revision = '0' +lt_age = '0' +lt_version = '@0@.@1@.@2@'.format(lt_current, lt_age, lt_revision) + +# hide some warnings +warning_flags = [ + '-Wno-unused-parameter', + '-Wno-sign-compare', + '-Wno-address-of-packed-member', +# '-Wno-implicit-fallthrough', +# '-Wno-missing-field-initializers', +# '-Wno-old-style-declaration', +] + +conf = configuration_data() + +cc = meson.get_compiler('c') +add_project_arguments(cc.get_supported_arguments(warning_flags), language : 'c') +add_project_arguments('-D_DEFAULT_SOURCE', language : 'c') +add_project_arguments('-DFLASHROM_VERSION="' + meson.project_version() + '"', language : 'c') + +# get defaults from configure +config_atahpt = get_option('config_atahpt') +config_atapromise = get_option('config_atapromise') +config_atavia = get_option('config_atavia') +config_buspirate_spi = get_option('config_buspirate_spi') +config_ch341a_spi = get_option('config_ch341a_spi') +config_dediprog = get_option('config_dediprog') +config_developerbox_spi = get_option('config_developerbox_spi') +config_digilent_spi = get_option('config_digilent_spi') +config_drkaiser = get_option('config_drkaiser') +config_dummy = get_option('config_dummy') +config_ft2232_spi = get_option('config_ft2232_spi') +config_gfxnvidia = get_option('config_gfxnvidia') +config_internal = get_option('config_internal') +config_it8212 = get_option('config_it8212') +config_linux_mtd = get_option('config_linux_mtd') +config_linux_spi = get_option('config_linux_spi') +config_mstarddc_spi = get_option('config_mstarddc_spi') +config_nic3com = get_option('config_nic3com') +config_nicintel_eeprom = get_option('config_nicintel_eeprom') +config_nicintel = get_option('config_nicintel') +config_nicintel_spi = get_option('config_nicintel_spi') +config_nicnatsemi = get_option('config_nicnatsemi') +config_nicrealtek = get_option('config_nicrealtek') +config_ogp_spi = get_option('config_ogp_spi') +config_pickit2_spi = get_option('config_pickit2_spi') +config_pony_spi = get_option('config_pony_spi') +config_rayer_spi = get_option('config_rayer_spi') +config_satamv = get_option('config_satamv') +config_satasii = get_option('config_satasii') +config_serprog = get_option('config_serprog') +config_usbblaster_spi = get_option('config_usbblaster_spi') + +cargs = [] +deps = [] +srcs = [] + +need_libusb0 = false + +# check for required symbols +if cc.has_function('clock_gettime') + add_project_arguments('-DHAVE_CLOCK_GETTIME=1', language : 'c') +endif +if cc.has_function('strnlen') + add_project_arguments('-DHAVE_STRNLEN=1', language : 'c') +endif +if cc.check_header('sys/utsname.h') + add_project_arguments('-DHAVE_UTSNAME=1', language : 'c') +endif + +# some programmers require libusb +if get_option('usb') + srcs += 'usbdev.c' + deps += dependency('libusb-1.0') +else + config_ch341a_spi = false + config_dediprog = false + config_digilent_spi = false + config_developerbox_spi = false +endif + +# some programmers require libpci +if get_option('pciutils') + srcs += 'pcidev.c' + deps += dependency('libpci') + cargs += '-DNEED_PCI=1' +else + config_atahpt = false + config_atapromise = false + config_atavia = false + config_drkaiser = false + config_gfxnvidia = false + config_internal = false + config_it8212 = false + config_nic3com = false + config_nicintel_eeprom = false + config_nicintel = false + config_nicintel_spi = false + config_nicnatsemi = false + config_nicrealtek = false + config_ogp_spi = false + config_rayer_spi = false + config_satamv = false + config_satasii = false +endif + +# set defines for configured programmers +if config_atahpt + srcs += 'atahpt.c' + cargs += '-DCONFIG_ATAHPT=1' +endif +if config_atapromise + srcs += 'atapromise.c' + cargs += '-DCONFIG_ATAPROMISE=1' +endif +if config_atavia + srcs += 'atavia.c' + cargs += '-DCONFIG_ATAVIA=1' +endif +if config_buspirate_spi + srcs += 'buspirate_spi.c' + cargs += '-DCONFIG_BUSPIRATE_SPI=1' + need_serial = true +endif +if config_ch341a_spi + srcs += 'ch341a_spi.c' + cargs += '-DCONFIG_CH341A_SPI=1' +endif +if config_dediprog + srcs += 'dediprog.c' + cargs += '-DCONFIG_DEDIPROG=1' +endif +if config_developerbox_spi + srcs += 'developerbox_spi.c' + cargs += '-DCONFIG_DEVELOPERBOX_SPI=1' +endif +if config_digilent_spi + srcs += 'digilent_spi.c' + cargs += '-DCONFIG_DIGILENT_SPI=1' +endif +if config_drkaiser + srcs += 'drkaiser.c' + cargs += '-DCONFIG_DRKAISER=1' +endif +if config_dummy + srcs += 'dummyflasher.c' + cargs += '-DCONFIG_DUMMY=1' +endif +if config_ft2232_spi + srcs += 'ft2232_spi.c' + cargs += '-DCONFIG_FT2232_SPI=1' + deps += dependency('libftdi1') + cargs += '-DHAVE_FT232H=1' +endif +if config_gfxnvidia + srcs += 'gfxnvidia.c' + cargs += '-DCONFIG_GFXNVIDIA=1' +endif +if config_internal + srcs += 'board_enable.c' + srcs += 'cbtable.c' + srcs += 'chipset_enable.c' + srcs += 'internal.c' + srcs += 'processor_enable.c' + if target_machine.cpu_family() == 'x86' or target_machine.cpu_family() == 'x86_64' + srcs += 'amd_imc.c' + srcs += 'dmi.c' + srcs += 'ichspi.c' + srcs += 'it85spi.c' + srcs += 'it87spi.c' + srcs += 'mcp6x_spi.c' + srcs += 'sb600spi.c' + srcs += 'wbsio_spi.c' + endif + config_bitbang_spi = true + cargs += '-DCONFIG_INTERNAL=1' + if get_option('config_internal_dmi') + # Use internal DMI/SMBIOS decoder by default instead of relying on dmidecode. + cargs += '-DCONFIG_INTERNAL_DMI=1' + endif +endif +if config_it8212 + srcs += 'it8212.c' + cargs += '-DCONFIG_IT8212=1' +endif +if config_linux_mtd + srcs += 'linux_mtd.c' + cargs += '-DCONFIG_LINUX_MTD=1' +endif +if config_linux_spi + srcs += 'linux_spi.c' + cargs += '-DCONFIG_LINUX_SPI=1' +endif +if config_mstarddc_spi + srcs += 'mstarddc_spi.c' + cargs += '-DCONFIG_MSTARDDC_SPI=1' +endif +if config_nic3com + srcs += 'nic3com.c' + cargs += '-DCONFIG_NIC3COM=1' +endif +if config_nicintel + srcs += 'nicintel.c' + cargs += '-DCONFIG_NICINTEL=1' +endif +if config_nicintel_eeprom + srcs += 'nicintel_eeprom.c' + cargs += '-DCONFIG_NICINTEL_EEPROM=1' +endif +if config_nicintel_spi + srcs += 'nicintel_spi.c' + config_bitbang_spi = true + cargs += '-DCONFIG_NICINTEL_SPI=1' +endif +if config_nicnatsemi + srcs += 'nicnatsemi.c' + cargs += '-DCONFIG_NICNATSEMI=1' +endif +if config_nicrealtek + srcs += 'nicrealtek.c' + cargs += '-DCONFIG_NICREALTEK=1' +endif +if config_ogp_spi + config_bitbang_spi = true + srcs += 'ogp_spi.c' + cargs += '-DCONFIG_OGP_SPI=1' +endif +if config_pickit2_spi + srcs += 'pickit2_spi.c' + cargs += '-DCONFIG_PICKIT2_SPI=1' + need_libusb0 = true +endif +if config_pony_spi + srcs += 'pony_spi.c' + need_serial = true + config_bitbang_spi = true + cargs += '-DCONFIG_PONY_SPI=1' +endif +if config_rayer_spi + srcs += 'rayer_spi.c' + config_bitbang_spi = true + need_raw_access = true + cargs += '-DCONFIG_RAYER_SPI=1' +endif +if config_satamv + srcs += 'satamv.c' + cargs += '-DCONFIG_SATAMV=1' +endif +if config_satasii + srcs += 'satasii.c' + cargs += '-DCONFIG_SATASII=1' +endif +if config_serprog + srcs += 'serprog.c' + cargs += '-DCONFIG_SERPROG=1' + need_serial = true +endif +if config_usbblaster_spi + srcs += 'usbblaster_spi.c' + cargs += '-DCONFIG_USBBLASTER_SPI=1' +endif + +# bitbanging SPI infrastructure +if config_bitbang_spi + srcs += 'bitbang_spi.c' + cargs += '-DCONFIG_BITBANG_SPI=1' +endif + +# raw memory, MSR or PCI port I/O access +if need_raw_access + srcs += 'hwaccess.c' + srcs += 'physmap.c' + cargs += '-DNEED_RAW_ACCESS=1' +endif + +# raw serial IO +if need_serial + srcs += 'custom_baud.c' + srcs += 'serial.c' +endif + +# raw deprecated and old USB library +if need_libusb0 + deps += dependency('libusb') +endif + +prefix = get_option('prefix') +sbindir = join_paths(prefix, get_option('sbindir')) +libdir = join_paths(prefix, get_option('libdir')) + +install_headers([ + 'libflashrom.h', + ], +) + +# core modules needed by both the library and the CLI +srcs += '82802ab.c' +srcs += 'at45db.c' +srcs += 'edi.c' +srcs += 'en29lv640b.c' +srcs += 'flashchips.c' +srcs += 'flashrom.c' +srcs += 'fmap.c' +srcs += 'helpers.c' +srcs += 'ich_descriptors.c' +srcs += 'jedec.c' +srcs += 'layout.c' +srcs += 'libflashrom.c' +srcs += 'opaque.c' +srcs += 'print.c' +srcs += 'programmer.c' +srcs += 'sfdp.c' +srcs += 'spi25.c' +srcs += 'spi25_statusreg.c' +srcs += 'spi.c' +srcs += 'sst28sf040.c' +srcs += 'sst49lfxxxc.c' +srcs += 'sst_fwhub.c' +srcs += 'stm50.c' +srcs += 'udelay.c' +srcs += 'w29ee011.c' +srcs += 'w39.c' + +mapfile = 'libflashrom.map' +vflag = '-Wl,--version-script,@0@/@1@'.format(meson.current_source_dir(), mapfile) +flashrom = shared_library( + 'flashrom', + sources : [ + srcs, + ], + soversion : lt_current, + version : lt_version, + dependencies : [ + deps, + ], + c_args : [ + cargs, + ], + install : true, + link_args : vflag, + link_depends : mapfile, +) + +pkgg = import('pkgconfig') +pkgg.generate( + libraries : flashrom, + version : meson.project_version(), + name : 'libflashrom', + filebase : 'libflashrom', + description : 'libflashrom', +) + +flashrom_dep = declare_dependency( + link_with : flashrom, + include_directories : include_directories('.'), + dependencies : deps +) + +# we can't just link_with libflashrom as we require all the internal symbols... +executable( + 'flashrom', + sources : [ + srcs, + 'cli_classic.c', + 'cli_common.c', + 'cli_output.c', + 'flashrom.c', + ], + dependencies : [ + deps, + ], + c_args : [ + cargs, + '-DSTANDALONE', + '-DCONFIG_DEFAULT_PROGRAMMER=PROGRAMMER_INVALID', + '-DCONFIG_DEFAULT_PROGRAMMER_ARGS=""', + ], + install : true, + install_dir : sbindir, +) + +subdir('util') diff --git a/meson_options.txt b/meson_options.txt new file mode 100644 index 0000000..962866c --- /dev/null +++ b/meson_options.txt @@ -0,0 +1,35 @@ +option('pciutils', type : 'boolean', value : true, description : 'use pciutils') +option('usb', type : 'boolean', value : true, description : 'use libusb1') + +option('config_atahpt', type : 'boolean', value : false, description : 'Highpoint (HPT) ATA/RAID controllers') +option('config_atapromise', type : 'boolean', value : false, description : 'Promise ATA controller') +option('config_atavia', type : 'boolean', value : true, description : 'VIA VT6421A LPC memory') +option('config_buspirate_spi', type : 'boolean', value : true, description : 'Bus Pirate SPI') +option('config_ch341a_spi', type : 'boolean', value : true, description : 'Winchiphead CH341A') +option('config_dediprog', type : 'boolean', value : true, description : 'Dediprog SF100') +option('config_developerbox_spi', type : 'boolean', value : true, description : 'Developerbox emergency recovery') +option('config_digilent_spi', type : 'boolean', value : true, description : 'Digilent Development board JTAG') +option('config_drkaiser', type : 'boolean', value : true, description : 'Dr. Kaiser') +option('config_dummy', type : 'boolean', value : true, description : 'dummy tracing') +option('config_ft2232_spi', type : 'boolean', value : true, description : 'FT2232 SPI dongles') +option('config_gfxnvidia', type : 'boolean', value : true, description : 'NVIDIA graphics cards') +option('config_internal', type : 'boolean', value : true, description : 'internal/onboard') +option('config_internal_dmi', type : 'boolean', value : true, description : 'Use internal DMI parser') +option('config_it8212', type : 'boolean', value : true, description : 'ITE IT8212F PATA') +option('config_linux_mtd', type : 'boolean', value : true, description : 'Linux MTD interfaces') +option('config_linux_spi', type : 'boolean', value : true, description : 'Linux spidev interfaces') +option('config_mstarddc_spi', type : 'boolean', value : false, description : 'MSTAR DDC support') +option('config_nic3com', type : 'boolean', value : true, description : '3Com NICs') +option('config_nicintel_eeprom', type : 'boolean', value : true, description : 'EEPROM on Intel NICs') +option('config_nicintel_spi', type : 'boolean', value : true, description : 'SPI on Intel NICs') +option('config_nicintel', type : 'boolean', value : true, description : 'Intel NICs') +option('config_nicnatsemi', type : 'boolean', value : false, description : 'National Semiconductor NICs') +option('config_nicrealtek', type : 'boolean', value : true, description : 'Realtek NICs') +option('config_ogp_spi', type : 'boolean', value : true, description : 'SPI on OGP cards') +option('config_pickit2_spi', type : 'boolean', value : false, description : 'PICkit2 SPI') +option('config_pony_spi', type : 'boolean', value : true, description : 'PonyProg2000 SPI') +option('config_rayer_spi', type : 'boolean', value : true, description : 'RayeR SPIPGM') +option('config_satamv', type : 'boolean', value : true, description : 'Marvell SATA controllers') +option('config_satasii', type : 'boolean', value : true, description : 'SiI SATA controllers') +option('config_serprog', type : 'boolean', value : true, description : 'serprog') +option('config_usbblaster_spi', type : 'boolean', value : true, description : 'Altera USB-Blaster dongles') diff --git a/util/ich_descriptors_tool/meson.build b/util/ich_descriptors_tool/meson.build new file mode 100644 index 0000000..b5bf09e --- /dev/null +++ b/util/ich_descriptors_tool/meson.build @@ -0,0 +1,14 @@ +executable( + 'ich_descriptors_tool', + sources : [ + 'ich_descriptors_tool.c', + '../../ich_descriptors.c', + ], + dependencies : [ + deps, + ], + include_directories : include_directories('../..'), + c_args : [ + '-DICH_DESCRIPTORS_FROM_DUMP_ONLY', + ], +) diff --git a/util/meson.build b/util/meson.build new file mode 100644 index 0000000..24278d7 --- /dev/null +++ b/util/meson.build @@ -0,0 +1 @@ +subdir('ich_descriptors_tool') -- To view, visit https://review.coreboot.org/c/flashrom/+/31248 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I3d950ece2a0568c09985eab47ddab9df1d0c43a2 Gerrit-Change-Number: 31248 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Hughes <richard(a)hughsie.com> Gerrit-MessageType: newchange

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Change in ...flashrom[master]: dediprog: Disable 4BA completely
by Nico Huber (Code Review) 02 Apr '19

02 Apr '19

Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/c/flashrom/+/30386 ) Change subject: dediprog: Disable 4BA completely ...................................................................... dediprog: Disable 4BA completely This is an interim solution. We'll have to enable 4BA step-by-step for each dediprog protocol version. Change-Id: I08efcbb09ab3499ef6902a698e9ce3d6232237c4 Signed-off-by: Nico Huber <nico.h(a)gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/30386 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: David Hendricks <david.hendricks(a)gmail.com> --- M dediprog.c M flashrom.c M programmer.h 3 files changed, 18 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified David Hendricks: Looks good to me, approved diff --git a/dediprog.c b/dediprog.c index 44a0018..c99c922 100644 --- a/dediprog.c +++ b/dediprog.c @@ -933,6 +933,7 @@ static const struct spi_master spi_master_dediprog = { .type = SPI_CONTROLLER_DEDIPROG, + .features = SPI_MASTER_NO_4BA_MODES, .max_data_read = 16, /* 18 seems to work fine as well, but 19 times out sometimes with FW 5.15. */ .max_data_write = 16, .command = dediprog_spi_send_command, diff --git a/flashrom.c b/flashrom.c index 135cc3e..d6c4d24 100644 --- a/flashrom.c +++ b/flashrom.c @@ -2333,6 +2333,16 @@ flash->address_high_byte = -1; flash->in_4ba_mode = false; + /* Be careful about 4BA chips and broken masters */ + if (flash->chip->total_size > 16 * 1024 && spi_master_no_4ba_modes(flash)) { + /* If we can't use native instructions, bail out */ + if ((flash->chip->feature_bits & FEATURE_4BA_NATIVE) != FEATURE_4BA_NATIVE + || !spi_master_4ba(flash)) { + msg_cerr("Programmer doesn't support this chip. Aborting.\n"); + return 1; + } + } + /* Enable/disable 4-byte addressing mode if flash chip supports it */ if (flash->chip->feature_bits & (FEATURE_4BA_ENTER | FEATURE_4BA_ENTER_WREN | FEATURE_4BA_ENTER_EAR7)) { int ret; diff --git a/programmer.h b/programmer.h index 8bf7d29..d22bc6b 100644 --- a/programmer.h +++ b/programmer.h @@ -659,6 +659,8 @@ #define MAX_DATA_WRITE_UNLIMITED 256 #define SPI_MASTER_4BA (1U << 0) /**< Can handle 4-byte addresses */ +#define SPI_MASTER_NO_4BA_MODES (1U << 1) /**< Compatibility modes (i.e. extended address + register, 4BA mode switch) don't work */ struct spi_master { enum spi_controller type; @@ -851,6 +853,11 @@ return flash->mst->buses_supported & BUS_SPI && flash->mst->spi.features & SPI_MASTER_4BA; } +static inline bool spi_master_no_4ba_modes(const struct flashctx *const flash) +{ + return flash->mst->buses_supported & BUS_SPI && + flash->mst->spi.features & SPI_MASTER_NO_4BA_MODES; +} /* usbdev.c */ struct libusb_device_handle; -- To view, visit https://review.coreboot.org/c/flashrom/+/30386 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I08efcbb09ab3499ef6902a698e9ce3d6232237c4 Gerrit-Change-Number: 30386 Gerrit-PatchSet: 4 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Stefan T <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: merged

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Change in ...flashrom[master]: Fix verification with sparse layouts
by Nico Huber (Code Review) 02 Apr '19

02 Apr '19

Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/c/flashrom/+/30370 ) Change subject: Fix verification with sparse layouts ...................................................................... Fix verification with sparse layouts The full verification step was not accounting for sparse layouts. Instead of the old contents, combine_image_by_layout() implicitly assumed the new contents for unspecified regions. Change-Id: I44e0cea621f2a3d4dc70fa7e93c52ed95e54014a Signed-off-by: Nico Huber <nico.h(a)gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/30370 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> --- M flashrom.c M layout.c M layout.h 3 files changed, 34 insertions(+), 9 deletions(-) Approvals: build bot (Jenkins): Verified Philipp Deppenwiese: Looks good to me, approved diff --git a/flashrom.c b/flashrom.c index b9e2b41..135cc3e 100644 --- a/flashrom.c +++ b/flashrom.c @@ -2430,17 +2430,23 @@ uint8_t *const newcontents, const uint8_t *const oldcontents) { const struct flashrom_layout *const layout = get_layout(flashctx); + const struct romentry *included; + chipoff_t start = 0; - size_t i; - for (i = 0; i < layout->num_entries; ++i) { - if (layout->entries[i].included) - continue; - - const chipoff_t region_start = layout->entries[i].start; - const chipsize_t region_len = layout->entries[i].end - layout->entries[i].start + 1; - - memcpy(newcontents + region_start, oldcontents + region_start, region_len); + while ((included = layout_next_included_region(layout, start))) { + if (included->start > start) { + /* copy everything up to the start of this included region */ + memcpy(newcontents + start, oldcontents + start, included->start - start); + } + /* skip this included region */ + start = included->end + 1; + if (start == 0) + return; } + + /* copy the rest of the chip */ + const chipsize_t copy_len = flashctx->chip->total_size * 1024 - start; + memcpy(newcontents + start, oldcontents + start, copy_len); } /** diff --git a/layout.c b/layout.c index e10bb73..5080e3e 100644 --- a/layout.c +++ b/layout.c @@ -227,3 +227,21 @@ return ret; } + +const struct romentry *layout_next_included_region( + const struct flashrom_layout *const l, const chipoff_t where) +{ + unsigned int i; + const struct romentry *lowest = NULL; + + for (i = 0; i < l->num_entries; ++i) { + if (!l->entries[i].included) + continue; + if (l->entries[i].end < where) + continue; + if (!lowest || lowest->start > l->entries[i].start) + lowest = &l->entries[i]; + } + + return lowest; +} diff --git a/layout.h b/layout.h index 770224b..5c07407 100644 --- a/layout.h +++ b/layout.h @@ -59,5 +59,6 @@ const struct flashrom_layout *get_layout(const struct flashrom_flashctx *const flashctx); int process_include_args(struct flashrom_layout *); +const struct romentry *layout_next_included_region(const struct flashrom_layout *, chipoff_t); #endif /* !__LAYOUT_H__ */ -- To view, visit https://review.coreboot.org/c/flashrom/+/30370 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I44e0cea621f2a3d4dc70fa7e93c52ed95e54014a Gerrit-Change-Number: 30370 Gerrit-PatchSet: 7 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Thomas Heijligen <src(a)posteo.de> Gerrit-MessageType: merged

1 0

Change in ...flashrom[master]: Fix verification with sparse layouts
by Philipp Deppenwiese (Code Review) 02 Apr '19

02 Apr '19

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/30370 ) Change subject: Fix verification with sparse layouts ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/30370 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I44e0cea621f2a3d4dc70fa7e93c52ed95e54014a Gerrit-Change-Number: 30370 Gerrit-PatchSet: 6 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Thomas Heijligen <src(a)posteo.de> Gerrit-Comment-Date: Tue, 02 Apr 2019 08:53:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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