April 2017 - flashrom-gerrit - mail.coreboot.org

Change in flashrom[staging]: spi25: Fix layering violation in default_spi_write_aai()
by build bot (Jenkins) (Code Review) 21 Apr '17

21 Apr '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19419 ) Change subject: spi25: Fix layering violation in default_spi_write_aai() ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom-customrules/176/ : SUCCESS https://qa.coreboot.org/job/flashrom_gerrit/190/ : SUCCESS -- To view, visit https://review.coreboot.org/19419 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I8aa3e2992f64906edc669060936f9522d32637fb Gerrit-PatchSet: 1 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in flashrom[staging]: spi: Drop spi_controller type
by build bot (Jenkins) (Code Review) 21 Apr '17

21 Apr '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19421 ) Change subject: spi: Drop spi_controller type ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom-customrules/178/ : SUCCESS https://qa.coreboot.org/job/flashrom_gerrit/191/ : SUCCESS -- To view, visit https://review.coreboot.org/19421 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I8eda93b429e3ebaef79e22aba76be62987e496f4 Gerrit-PatchSet: 1 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in flashrom[staging]: spi25: Fix layering violation in probe_spi_rdid4()
by build bot (Jenkins) (Code Review) 21 Apr '17

21 Apr '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19420 ) Change subject: spi25: Fix layering violation in probe_spi_rdid4() ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom-customrules/177/ : SUCCESS https://qa.coreboot.org/job/flashrom_gerrit/189/ : SUCCESS -- To view, visit https://review.coreboot.org/19420 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Idd21d20465cb214f3ff5bf3267b9014f8beee3f3 Gerrit-PatchSet: 1 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in flashrom[staging]: spi: Add valid_addr_offset() to spi_master
by build bot (Jenkins) (Code Review) 21 Apr '17

21 Apr '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19418 ) Change subject: spi: Add valid_addr_offset() to spi_master ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom-customrules/175/ : SUCCESS https://qa.coreboot.org/job/flashrom_gerrit/188/ : SUCCESS -- To view, visit https://review.coreboot.org/19418 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Icbac513c5339e8aff624870252133284ef85ab73 Gerrit-PatchSet: 1 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in flashrom[staging]: bitbang_spi: Drop bitbang_spi_master_type
by build bot (Jenkins) (Code Review) 21 Apr '17

21 Apr '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19417 ) Change subject: bitbang_spi: Drop bitbang_spi_master_type ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom-customrules/174/ : SUCCESS https://qa.coreboot.org/job/flashrom_gerrit/187/ : SUCCESS -- To view, visit https://review.coreboot.org/19417 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I7a3b5d9ff1e99d2d4f873c6f19fb318f93762037 Gerrit-PatchSet: 1 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in flashrom[staging]: spi: Drop spi_controller type
by Nico Huber (Code Review) 21 Apr '17

21 Apr '17

Nico Huber has uploaded a new change for review. ( https://review.coreboot.org/19421 ) Change subject: spi: Drop spi_controller type ...................................................................... spi: Drop spi_controller type Not needed anymore. Drop it fast before it encourages anyone to layering violations again! Change-Id: I8eda93b429e3ebaef79e22aba76be62987e496f4 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M buspirate_spi.c M ch341a_spi.c M dediprog.c M dummyflasher.c M ft2232_spi.c M ichspi.c M it85spi.c M it87spi.c M linux_spi.c M mstarddc_spi.c M pickit2_spi.c M programmer.h M sb600spi.c M serprog.c M usbblaster_spi.c M wbsio_spi.c 16 files changed, 0 insertions(+), 68 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/21/19421/1 diff --git a/buspirate_spi.c b/buspirate_spi.c index b6554ac..fe3c831 100644 --- a/buspirate_spi.c +++ b/buspirate_spi.c @@ -135,7 +135,6 @@ const unsigned char *writearr, unsigned char *readarr); static struct spi_master spi_master_buspirate = { - .type = SPI_CONTROLLER_BUSPIRATE, .max_data_read = MAX_DATA_UNSPECIFIED, .max_data_write = MAX_DATA_UNSPECIFIED, .command = NULL, diff --git a/ch341a_spi.c b/ch341a_spi.c index 6eb2804..01cb847 100644 --- a/ch341a_spi.c +++ b/ch341a_spi.c @@ -398,7 +398,6 @@ } static const struct spi_master spi_master_ch341a_spi = { - .type = SPI_CONTROLLER_CH341A_SPI, /* flashrom's current maximum is 256 B. CH341A was tested on Linux and Windows to accept atleast * 128 kB. Basically there should be no hard limit because transfers are broken up into USB packets * sent to the device and most of their payload streamed via SPI. */ diff --git a/dediprog.c b/dediprog.c index 6f82772..a73aa8c 100644 --- a/dediprog.c +++ b/dediprog.c @@ -909,7 +909,6 @@ } static const struct spi_master spi_master_dediprog = { - .type = SPI_CONTROLLER_DEDIPROG, .max_data_read = 16, /* 18 seems to work fine as well, but 19 times out sometimes with FW 5.15. */ .max_data_write = 16, .command = dediprog_spi_send_command, diff --git a/dummyflasher.c b/dummyflasher.c index f171128..2ecff49 100644 --- a/dummyflasher.c +++ b/dummyflasher.c @@ -110,7 +110,6 @@ static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); static const struct spi_master spi_master_dummyflasher = { - .type = SPI_CONTROLLER_DUMMY, .max_data_read = MAX_DATA_READ_UNLIMITED, .max_data_write = MAX_DATA_UNSPECIFIED, .command = dummy_spi_send_command, diff --git a/ft2232_spi.c b/ft2232_spi.c index be60837..39d7707 100644 --- a/ft2232_spi.c +++ b/ft2232_spi.c @@ -158,7 +158,6 @@ unsigned char *readarr); static const struct spi_master spi_master_ft2232 = { - .type = SPI_CONTROLLER_FT2232, .max_data_read = 64 * 1024, .max_data_write = 256, .command = ft2232_spi_send_command, diff --git a/ichspi.c b/ichspi.c index 1ab114c..86d3faf 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1542,7 +1542,6 @@ } static const struct spi_master spi_master_ich7 = { - .type = SPI_CONTROLLER_ICH7, .max_data_read = 64, .max_data_write = 64, .command = ich_spi_send_command, @@ -1554,7 +1553,6 @@ }; static const struct spi_master spi_master_ich9 = { - .type = SPI_CONTROLLER_ICH9, .max_data_read = 64, .max_data_write = 64, .command = ich_spi_send_command, @@ -1831,7 +1829,6 @@ } static const struct spi_master spi_master_via = { - .type = SPI_CONTROLLER_VIA, .max_data_read = 16, .max_data_write = 16, .command = ich_spi_send_command, diff --git a/it85spi.c b/it85spi.c index 1cc8730..25b084e 100644 --- a/it85spi.c +++ b/it85spi.c @@ -280,7 +280,6 @@ unsigned char *readarr); static const struct spi_master spi_master_it85xx = { - .type = SPI_CONTROLLER_IT85XX, .max_data_read = 64, .max_data_write = 64, .command = it85xx_spi_send_command, diff --git a/it87spi.c b/it87spi.c index 09793de..5c7ee3a 100644 --- a/it87spi.c +++ b/it87spi.c @@ -112,7 +112,6 @@ unsigned int start, unsigned int len); static const struct spi_master spi_master_it87xx = { - .type = SPI_CONTROLLER_IT87XX, .max_data_read = 3, .max_data_write = MAX_DATA_UNSPECIFIED, .command = it8716f_spi_send_command, diff --git a/linux_spi.c b/linux_spi.c index e51fbc4..82e7ef7 100644 --- a/linux_spi.c +++ b/linux_spi.c @@ -54,7 +54,6 @@ unsigned int start, unsigned int len); static const struct spi_master spi_master_linux = { - .type = SPI_CONTROLLER_LINUX, .max_data_read = MAX_DATA_UNSPECIFIED, /* TODO? */ .max_data_write = MAX_DATA_UNSPECIFIED, /* TODO? */ .command = linux_spi_send_command, diff --git a/mstarddc_spi.c b/mstarddc_spi.c index 809d690..faab347 100644 --- a/mstarddc_spi.c +++ b/mstarddc_spi.c @@ -224,7 +224,6 @@ } static const struct spi_master spi_master_mstarddc = { - .type = SPI_CONTROLLER_MSTARDDC, .max_data_read = 256, .max_data_write = 256, .command = mstarddc_spi_send_command, diff --git a/pickit2_spi.c b/pickit2_spi.c index 102fe37..d1cd415 100644 --- a/pickit2_spi.c +++ b/pickit2_spi.c @@ -354,7 +354,6 @@ } static const struct spi_master spi_master_pickit2 = { - .type = SPI_CONTROLLER_PICKIT2, .max_data_read = 40, .max_data_write = 40, .command = pickit2_spi_send_command, diff --git a/programmer.h b/programmer.h index b5306db..2779a13 100644 --- a/programmer.h +++ b/programmer.h @@ -530,60 +530,10 @@ char *extract_programmer_param(const char *param_name); /* spi.c */ -enum spi_controller { - SPI_CONTROLLER_NONE, -#if CONFIG_INTERNAL == 1 -#if defined(__i386__) || defined(__x86_64__) - SPI_CONTROLLER_ICH7, - SPI_CONTROLLER_ICH9, - SPI_CONTROLLER_IT85XX, - SPI_CONTROLLER_IT87XX, - SPI_CONTROLLER_SB600, - SPI_CONTROLLER_YANGTZE, - SPI_CONTROLLER_VIA, - SPI_CONTROLLER_WBSIO, -#endif -#endif -#if CONFIG_FT2232_SPI == 1 - SPI_CONTROLLER_FT2232, -#endif -#if CONFIG_DUMMY == 1 - SPI_CONTROLLER_DUMMY, -#endif -#if CONFIG_BUSPIRATE_SPI == 1 - SPI_CONTROLLER_BUSPIRATE, -#endif -#if CONFIG_DEDIPROG == 1 - SPI_CONTROLLER_DEDIPROG, -#endif -#if CONFIG_OGP_SPI == 1 || CONFIG_NICINTEL_SPI == 1 || CONFIG_RAYER_SPI == 1 || CONFIG_PONY_SPI == 1 || (CONFIG_INTERNAL == 1 && (defined(__i386__) || defined(__x86_64__))) - SPI_CONTROLLER_BITBANG, -#endif -#if CONFIG_LINUX_SPI == 1 - SPI_CONTROLLER_LINUX, -#endif -#if CONFIG_SERPROG == 1 - SPI_CONTROLLER_SERPROG, -#endif -#if CONFIG_USBBLASTER_SPI == 1 - SPI_CONTROLLER_USBBLASTER, -#endif -#if CONFIG_MSTARDDC_SPI == 1 - SPI_CONTROLLER_MSTARDDC, -#endif -#if CONFIG_PICKIT2_SPI == 1 - SPI_CONTROLLER_PICKIT2, -#endif -#if CONFIG_CH341A_SPI == 1 - SPI_CONTROLLER_CH341A_SPI, -#endif -}; - #define MAX_DATA_UNSPECIFIED 0 #define MAX_DATA_READ_UNLIMITED 64 * 1024 #define MAX_DATA_WRITE_UNLIMITED 256 struct spi_master { - enum spi_controller type; unsigned int max_data_read; // (Ideally,) maximum data read size in one go (excluding opcode+address). unsigned int max_data_write; // (Ideally,) maximum data write size in one go (excluding opcode+address). int (*command)(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, diff --git a/sb600spi.c b/sb600spi.c index 6bd5679..dc5419b 100644 --- a/sb600spi.c +++ b/sb600spi.c @@ -65,7 +65,6 @@ const unsigned char *writearr, unsigned char *readarr); static struct spi_master spi_master_sb600 = { - .type = SPI_CONTROLLER_SB600, .max_data_read = FIFO_SIZE_OLD, .max_data_write = FIFO_SIZE_OLD - 3, .command = sb600_spi_send_command, @@ -76,7 +75,6 @@ }; static struct spi_master spi_master_yangtze = { - .type = SPI_CONTROLLER_YANGTZE, .max_data_read = FIFO_SIZE_YANGTZE - 3, /* Apparently the big SPI 100 buffer is not a ring buffer. */ .max_data_write = FIFO_SIZE_YANGTZE - 3, .command = spi100_spi_send_command, diff --git a/serprog.c b/serprog.c index 98aac83..7d35566 100644 --- a/serprog.c +++ b/serprog.c @@ -306,7 +306,6 @@ static int serprog_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); static struct spi_master spi_master_serprog = { - .type = SPI_CONTROLLER_SERPROG, .max_data_read = MAX_DATA_READ_UNLIMITED, .max_data_write = MAX_DATA_WRITE_UNLIMITED, .command = serprog_spi_send_command, diff --git a/usbblaster_spi.c b/usbblaster_spi.c index 7a609f1..8679f24 100644 --- a/usbblaster_spi.c +++ b/usbblaster_spi.c @@ -212,7 +212,6 @@ static const struct spi_master spi_master_usbblaster = { - .type = SPI_CONTROLLER_USBBLASTER, .max_data_read = 256, .max_data_write = 256, .command = usbblaster_spi_send_command, diff --git a/wbsio_spi.c b/wbsio_spi.c index 577a7d1..943653a 100644 --- a/wbsio_spi.c +++ b/wbsio_spi.c @@ -69,7 +69,6 @@ unsigned int start, unsigned int len); static const struct spi_master spi_master_wbsio = { - .type = SPI_CONTROLLER_WBSIO, .max_data_read = 3, .max_data_write = MAX_DATA_UNSPECIFIED, .command = wbsio_spi_send_command, -- To view, visit https://review.coreboot.org/19421 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: I8eda93b429e3ebaef79e22aba76be62987e496f4 Gerrit-PatchSet: 1 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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Change in flashrom[staging]: spi25: Fix layering violation in probe_spi_rdid4()
by Nico Huber (Code Review) 21 Apr '17

21 Apr '17

Nico Huber has uploaded a new change for review. ( https://review.coreboot.org/19420 ) Change subject: spi25: Fix layering violation in probe_spi_rdid4() ...................................................................... spi25: Fix layering violation in probe_spi_rdid4() Change-Id: Idd21d20465cb214f3ff5bf3267b9014f8beee3f3 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M it87spi.c M spi25.c M wbsio_spi.c 3 files changed, 4 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/20/19420/1 diff --git a/it87spi.c b/it87spi.c index c9e35dd..09793de 100644 --- a/it87spi.c +++ b/it87spi.c @@ -113,7 +113,7 @@ static const struct spi_master spi_master_it87xx = { .type = SPI_CONTROLLER_IT87XX, - .max_data_read = MAX_DATA_UNSPECIFIED, + .max_data_read = 3, .max_data_write = MAX_DATA_UNSPECIFIED, .command = it8716f_spi_send_command, .multicommand = default_spi_send_multicommand, diff --git a/spi25.c b/spi25.c index 717e57d..ad32c7e 100644 --- a/spi25.c +++ b/spi25.c @@ -172,21 +172,12 @@ /* Some SPI controllers do not support commands with writecnt=1 and * readcnt=4. */ - switch (flash->mst->spi.type) { -#if CONFIG_INTERNAL == 1 -#if defined(__i386__) || defined(__x86_64__) - case SPI_CONTROLLER_IT87XX: - case SPI_CONTROLLER_WBSIO: + if (flash->mst->spi.max_data_read < 4) { msg_cinfo("4 byte RDID not supported on this SPI controller\n"); return 0; - break; -#endif -#endif - default: + } else { return probe_spi_rdid_generic(flash, 4); } - - return 0; } int probe_spi_rems(struct flashctx *flash) diff --git a/wbsio_spi.c b/wbsio_spi.c index d103152..577a7d1 100644 --- a/wbsio_spi.c +++ b/wbsio_spi.c @@ -70,7 +70,7 @@ static const struct spi_master spi_master_wbsio = { .type = SPI_CONTROLLER_WBSIO, - .max_data_read = MAX_DATA_UNSPECIFIED, + .max_data_read = 3, .max_data_write = MAX_DATA_UNSPECIFIED, .command = wbsio_spi_send_command, .multicommand = default_spi_send_multicommand, -- To view, visit https://review.coreboot.org/19420 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: Idd21d20465cb214f3ff5bf3267b9014f8beee3f3 Gerrit-PatchSet: 1 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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Change in flashrom[staging]: spi25: Fix layering violation in default_spi_write_aai()
by Nico Huber (Code Review) 21 Apr '17

21 Apr '17

Nico Huber has uploaded a new change for review. ( https://review.coreboot.org/19419 ) Change subject: spi25: Fix layering violation in default_spi_write_aai() ...................................................................... spi25: Fix layering violation in default_spi_write_aai() Change-Id: I8aa3e2992f64906edc669060936f9522d32637fb Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M it87spi.c M spi25.c M wbsio_spi.c 3 files changed, 2 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/19/19419/1 diff --git a/it87spi.c b/it87spi.c index 0a1e894..c9e35dd 100644 --- a/it87spi.c +++ b/it87spi.c @@ -119,7 +119,7 @@ .multicommand = default_spi_send_multicommand, .read = it8716f_spi_chip_read, .write_256 = it8716f_spi_chip_write_256, - .write_aai = default_spi_write_aai, + .write_aai = spi_chip_write_1, }; static uint16_t it87spi_probe(uint16_t port) diff --git a/spi25.c b/spi25.c index af4b6db..717e57d 100644 --- a/spi25.c +++ b/spi25.c @@ -1079,20 +1079,6 @@ .readarr = NULL, }}; - switch (flash->mst->spi.type) { -#if CONFIG_INTERNAL == 1 -#if defined(__i386__) || defined(__x86_64__) - case SPI_CONTROLLER_IT87XX: - case SPI_CONTROLLER_WBSIO: - msg_perr("%s: impossible with this SPI controller," - " degrading to byte program\n", __func__); - return spi_chip_write_1(flash, buf, start, len); -#endif -#endif - default: - break; - } - /* The even start address and even length requirements can be either * honored outside this function, or we can call spi_byte_program * for the first and/or last byte and use AAI for the rest. diff --git a/wbsio_spi.c b/wbsio_spi.c index 0eeeb9b..d103152 100644 --- a/wbsio_spi.c +++ b/wbsio_spi.c @@ -76,7 +76,7 @@ .multicommand = default_spi_send_multicommand, .read = wbsio_spi_read, .write_256 = spi_chip_write_1, - .write_aai = default_spi_write_aai, + .write_aai = spi_chip_write_1, }; int wbsio_check_for_spi(void) -- To view, visit https://review.coreboot.org/19419 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: I8aa3e2992f64906edc669060936f9522d32637fb Gerrit-PatchSet: 1 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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Change in flashrom[staging]: spi: Add valid_addr_offset() to spi_master
by Nico Huber (Code Review) 21 Apr '17

21 Apr '17

Nico Huber has uploaded a new change for review. ( https://review.coreboot.org/19418 ) Change subject: spi: Add valid_addr_offset() to spi_master ...................................................................... spi: Add valid_addr_offset() to spi_master Get rid of the layering violations around ICH's BBAR. Change-Id: Icbac513c5339e8aff624870252133284ef85ab73 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M ichspi.c M programmer.h M spi.c 3 files changed, 20 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/18/19418/1 diff --git a/ichspi.c b/ichspi.c index e1395ee..1ab114c 100644 --- a/ichspi.c +++ b/ichspi.c @@ -639,6 +639,17 @@ min_addr, ichspi_bbar); } +static uint32_t ich_valid_addr_offset(struct flashctx *const flash) +{ + switch (ich_generation) { + case CHIPSET_ICH7: + case CHIPSET_ICH9: + return ichspi_bbar; + default: + return 0; + } +} + /* Read len bytes from the fdata/spid register into the data array. * * Note that using len > flash->mst->spi.max_data_read will return garbage or @@ -1539,6 +1550,7 @@ .read = default_spi_read, .write_256 = default_spi_write_256, .write_aai = default_spi_write_aai, + .valid_addr_offset = ich_valid_addr_offset, }; static const struct spi_master spi_master_ich9 = { @@ -1550,6 +1562,7 @@ .read = default_spi_read, .write_256 = default_spi_write_256, .write_aai = default_spi_write_aai, + .valid_addr_offset = ich_valid_addr_offset, }; static const struct opaque_master opaque_master_ich_hwseq = { diff --git a/programmer.h b/programmer.h index 63057d7..b5306db 100644 --- a/programmer.h +++ b/programmer.h @@ -595,6 +595,10 @@ int (*write_256)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); int (*write_aai)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); const void *data; + + /* Get the lowest allowed address for flash accesses. + If not set, a constant zero offset will be assumed. */ + uint32_t (*valid_addr_offset)(struct flashctx *flash); }; int default_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, diff --git a/spi.c b/spi.c index 894f73f..4e50fc1 100644 --- a/spi.c +++ b/spi.c @@ -146,18 +146,10 @@ */ uint32_t spi_get_valid_read_addr(struct flashctx *flash) { - switch (flash->mst->spi.type) { -#if CONFIG_INTERNAL == 1 -#if defined(__i386__) || defined(__x86_64__) - case SPI_CONTROLLER_ICH7: - case SPI_CONTROLLER_ICH9: - /* Return BBAR for ICH chipsets. */ - return ichspi_bbar; -#endif -#endif - default: + if (flash->mst->spi.valid_addr_offset) + return flash->mst->spi.valid_addr_offset(flash); + else return 0; - } } int spi_aai_write(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len) -- To view, visit https://review.coreboot.org/19418 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: Icbac513c5339e8aff624870252133284ef85ab73 Gerrit-PatchSet: 1 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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Change in flashrom[staging]: bitbang_spi: Drop bitbang_spi_master_type
by Nico Huber (Code Review) 21 Apr '17

21 Apr '17

Nico Huber has uploaded a new change for review. ( https://review.coreboot.org/19417 ) Change subject: bitbang_spi: Drop bitbang_spi_master_type ...................................................................... bitbang_spi: Drop bitbang_spi_master_type It only existed to make maintenance harder and waste our time. Change-Id: I7a3b5d9ff1e99d2d4f873c6f19fb318f93762037 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M bitbang_spi.c M mcp6x_spi.c M nicintel_spi.c M ogp_spi.c M pony_spi.c M programmer.h M rayer_spi.c 7 files changed, 2 insertions(+), 34 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/17/19417/1 diff --git a/bitbang_spi.c b/bitbang_spi.c index 0b27a67..17b7426 100644 --- a/bitbang_spi.c +++ b/bitbang_spi.c @@ -64,7 +64,6 @@ unsigned char *readarr); static const struct spi_master spi_master_bitbang = { - .type = SPI_CONTROLLER_BITBANG, .max_data_read = MAX_DATA_READ_UNLIMITED, .max_data_write = MAX_DATA_WRITE_UNLIMITED, .command = bitbang_spi_send_command, @@ -85,11 +84,8 @@ int register_spi_bitbang_master(const struct bitbang_spi_master *master) { struct spi_master mst = spi_master_bitbang; - /* BITBANG_SPI_INVALID is 0, so if someone forgot to initialize ->type, - * we catch it here. Same goes for missing initialization of bitbanging - * functions. - */ - if (!master || master->type == BITBANG_SPI_INVALID || !master->set_cs || + /* If someone forgot to initialize a bitbang function, we catch it here. */ + if (!master || !master->set_cs || !master->set_sck || !master->set_mosi || !master->get_miso || (master->request_bus && !master->release_bus) || (!master->request_bus && master->release_bus)) { diff --git a/mcp6x_spi.c b/mcp6x_spi.c index 4a57cb0..f41e6ab 100644 --- a/mcp6x_spi.c +++ b/mcp6x_spi.c @@ -92,7 +92,6 @@ } static const struct bitbang_spi_master bitbang_spi_master_mcp6x = { - .type = BITBANG_SPI_MASTER_MCP, .set_cs = mcp6x_bitbang_set_cs, .set_sck = mcp6x_bitbang_set_sck, .set_mosi = mcp6x_bitbang_set_mosi, diff --git a/nicintel_spi.c b/nicintel_spi.c index 9195c79..348fd8b 100644 --- a/nicintel_spi.c +++ b/nicintel_spi.c @@ -159,7 +159,6 @@ } static const struct bitbang_spi_master bitbang_spi_master_nicintel = { - .type = BITBANG_SPI_MASTER_NICINTEL, .set_cs = nicintel_bitbang_set_cs, .set_sck = nicintel_bitbang_set_sck, .set_mosi = nicintel_bitbang_set_mosi, diff --git a/ogp_spi.c b/ogp_spi.c index 929ecd9..63895a2 100644 --- a/ogp_spi.c +++ b/ogp_spi.c @@ -87,7 +87,6 @@ } static const struct bitbang_spi_master bitbang_spi_master_ogp = { - .type = BITBANG_SPI_MASTER_OGP, .set_cs = ogp_bitbang_set_cs, .set_sck = ogp_bitbang_set_sck, .set_mosi = ogp_bitbang_set_mosi, diff --git a/pony_spi.c b/pony_spi.c index f8faeb3..0bae340 100644 --- a/pony_spi.c +++ b/pony_spi.c @@ -95,7 +95,6 @@ } static const struct bitbang_spi_master bitbang_spi_master_pony = { - .type = BITBANG_SPI_MASTER_PONY, .set_cs = pony_bitbang_set_cs, .set_sck = pony_bitbang_set_sck, .set_mosi = pony_bitbang_set_mosi, diff --git a/programmer.h b/programmer.h index 3853413..63057d7 100644 --- a/programmer.h +++ b/programmer.h @@ -149,30 +149,7 @@ int programmer_init(enum programmer prog, const char *param); int programmer_shutdown(void); -enum bitbang_spi_master_type { - BITBANG_SPI_INVALID = 0, /* This must always be the first entry. */ -#if CONFIG_RAYER_SPI == 1 - BITBANG_SPI_MASTER_RAYER, -#endif -#if CONFIG_PONY_SPI == 1 - BITBANG_SPI_MASTER_PONY, -#endif -#if CONFIG_NICINTEL_SPI == 1 - BITBANG_SPI_MASTER_NICINTEL, -#endif -#if CONFIG_INTERNAL == 1 -#if defined(__i386__) || defined(__x86_64__) - BITBANG_SPI_MASTER_MCP, -#endif -#endif -#if CONFIG_OGP_SPI == 1 - BITBANG_SPI_MASTER_OGP, -#endif -}; - struct bitbang_spi_master { - enum bitbang_spi_master_type type; - /* Note that CS# is active low, so val=0 means the chip is active. */ void (*set_cs) (int val); void (*set_sck) (int val); diff --git a/rayer_spi.c b/rayer_spi.c index 3656d26..dea7104 100644 --- a/rayer_spi.c +++ b/rayer_spi.c @@ -161,7 +161,6 @@ } static const struct bitbang_spi_master bitbang_spi_master_rayer = { - .type = BITBANG_SPI_MASTER_RAYER, .set_cs = rayer_bitbang_set_cs, .set_sck = rayer_bitbang_set_sck, .set_mosi = rayer_bitbang_set_mosi, -- To view, visit https://review.coreboot.org/19417 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: I7a3b5d9ff1e99d2d4f873c6f19fb318f93762037 Gerrit-PatchSet: 1 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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flashrom-gerrit April 2017