Hi,
here is the patch for RTL1839 based NICs. Still got some problems: * Those Nics can have a wide varity of PCI (Vendor) IDs. * Code is instable, "erase" fails but "read" reads only FFs.
It is disabled by default in the Makefile.
Regards, Jörg Fischer
Signed-off-by: Joerg Fischer turboj@gmx.de
Index: flash.h =================================================================== --- flash.h (Revision 999) +++ flash.h (Arbeitskopie) @@ -46,6 +46,10 @@ #if NIC3COM_SUPPORT == 1 PROGRAMMER_NIC3COM, #endif +#if NICREALTEK_SUPPORT == 1 + PROGRAMMER_NICREALTEK, + PROGRAMMER_NICREALTEK2, +#endif #if GFXNVIDIA_SUPPORT == 1 PROGRAMMER_GFXNVIDIA, #endif @@ -330,7 +334,7 @@ /* print.c */ char *flashbuses_to_text(enum chipbustype bustype); void print_supported(void); -#if (NIC3COM_SUPPORT == 1) || (GFXNVIDIA_SUPPORT == 1) || (DRKAISER_SUPPORT == 1) || (SATASII_SUPPORT == 1) || (ATAHPT_SUPPORT == 1) +#if (NIC3COM_SUPPORT == 1) || (GFXNVIDIA_SUPPORT == 1) || (DRKAISER_SUPPORT == 1) || (SATASII_SUPPORT == 1) || (ATAHPT_SUPPORT == 1) || (NICREALTEK_SUPPORT == 1) void print_supported_pcidevs(struct pcidev_status *devs); #endif void print_supported_wiki(void); @@ -462,6 +466,18 @@ extern struct pcidev_status drkaiser_pcidev[]; #endif
+/* nicrealtek.c */ +#if NICREALTEK_SUPPORT == 1 +int nicrealtek_init(void); +int nicsmc1211_init(void); +int nicrealtek_shutdown(void); +void nicrealtek_chip_writeb(uint8_t val, chipaddr addr); +uint8_t nicrealtek_chip_readb(const chipaddr addr); +extern struct pcidev_status nics_realtek[]; +extern struct pcidev_status nics_realteksmc1211[]; +#endif + + /* satasii.c */ #if SATASII_SUPPORT == 1 int satasii_init(void); Index: flashrom.c =================================================================== --- flashrom.c (Revision 999) +++ flashrom.c (Arbeitskopie) @@ -47,13 +47,17 @@ * if more than one of them is selected. If only one is selected, it is clear * that the user wants that one to become the default. */ -#if NIC3COM_SUPPORT+GFXNVIDIA_SUPPORT+DRKAISER_SUPPORT+SATASII_SUPPORT+ATAHPT_SUPPORT+FT2232_SPI_SUPPORT+SERPROG_SUPPORT+BUSPIRATE_SPI_SUPPORT+DEDIPROG_SUPPORT > 1 +#if NIC3COM_SUPPORT+GFXNVIDIA_SUPPORT+DRKAISER_SUPPORT+SATASII_SUPPORT+ATAHPT_SUPPORT+FT2232_SPI_SUPPORT+SERPROG_SUPPORT+BUSPIRATE_SPI_SUPPORT+DEDIPROG_SUPPORT+NICREALTEK_SUPPORT > 1 #error Please enable either CONFIG_DUMMY or CONFIG_INTERNAL or disable support for all external programmers except one. #endif enum programmer programmer = #if NIC3COM_SUPPORT == 1 PROGRAMMER_NIC3COM #endif +#if NICREALTEK_SUPPORT == 1 + PROGRAMMER_NICREALTEK + PROGRAMMER_NICREALTEK2 +#endif #if GFXNVIDIA_SUPPORT == 1 PROGRAMMER_GFXNVIDIA #endif @@ -159,6 +163,42 @@ }, #endif
+#if NICREALTEK_SUPPORT == 1 + { + .name = "nicrealtek", + .init = nicrealtek_init, + .shutdown = nicrealtek_shutdown, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .chip_readb = nicrealtek_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = nicrealtek_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, + .delay = internal_delay, + }, + { + .name = "nicsmc1211", + .init = nicsmc1211_init, + .shutdown = nicrealtek_shutdown, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .chip_readb = nicrealtek_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = nicrealtek_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, + .delay = internal_delay, + }, +#endif + + #if GFXNVIDIA_SUPPORT == 1 { .name = "gfxnvidia", Index: Makefile =================================================================== --- Makefile (Revision 999) +++ Makefile (Arbeitskopie) @@ -110,6 +110,9 @@ # Always enable Dr. Kaiser for now. CONFIG_DRKAISER ?= yes
+# Disable Realtek NICs for now, not working correctly. +CONFIG_NICREALTEK ?= no + # Always enable Bus Pirate SPI for now. CONFIG_BUSPIRATESPI ?= yes
@@ -181,6 +184,14 @@ NEED_PCI := yes endif
+ +ifeq ($(CONFIG_NICREALTEK), yes) +FEATURE_CFLAGS += -D'NICREALTEK_SUPPORT=1' +PROGRAMMER_OBJS += nicrealtek.o +NEED_PCI := yes +endif + + ifeq ($(CONFIG_BUSPIRATESPI), yes) FEATURE_CFLAGS += -D'BUSPIRATE_SPI_SUPPORT=1' PROGRAMMER_OBJS += buspirate_spi.o Index: nicrealtek.c =================================================================== --- nicrealtek.c (Revision 0) +++ nicrealtek.c (Revision 0) @@ -0,0 +1,84 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009 TURBO J turboj@gmx.de + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdlib.h> +#include <string.h> +#include <sys/types.h> +#include "flash.h" + +#define PCI_VENDOR_ID_REALTEK 0x10ec +#define PCI_VENDOR_ID_SMC1211 0x1113 + +#define BIOS_ROM_ADDR 0xD4 +#define BIOS_ROM_DATA 0xD7 + +struct pcidev_status nics_realtek[] = { + {0x10ec, 0x8139, OK, "Realtek","rtl8139b/c PCI 10/100 Mbps"}, + {}, +}; + +struct pcidev_status nics_realteksmc1211[] = { + {0x1113, 0x1211, OK, "SMC", "SMC 1211TX rtl8139 clone 10/100 Mbps"}, + {} +}; + + +int nicrealtek_init(void) +{ + get_io_perms(); + io_base_addr = pcidev_init(PCI_VENDOR_ID_REALTEK, PCI_BASE_ADDRESS_0, + nics_realtek, programmer_param); + + buses_supported = CHIP_BUSTYPE_PARALLEL; + + return 0; +} + + +int nicsmc1211_init(void) +{ + get_io_perms(); + io_base_addr = pcidev_init(PCI_VENDOR_ID_SMC1211, PCI_BASE_ADDRESS_0, + nics_realteksmc1211, programmer_param); + + buses_supported = CHIP_BUSTYPE_PARALLEL; + + return 0; +} + +int nicrealtek_shutdown(void) +{ + free(programmer_param); + pci_cleanup(pacc); + release_io_perms(); + return 0; +} + +void nicrealtek_chip_writeb(uint8_t val, chipaddr addr) +{ + OUTL(((uint32_t)addr &0x01FFFF)|0x0A0000| (val << 24), io_base_addr + BIOS_ROM_ADDR); + OUTL(((uint32_t)addr &0x01FFFF)|0x1E0000| (val << 24), io_base_addr + BIOS_ROM_ADDR); +} + +uint8_t nicrealtek_chip_readb(const chipaddr addr) +{ + OUTL(((uint32_t)addr & 0x01FFFF) | 0x060000, io_base_addr + BIOS_ROM_ADDR); + return INB(io_base_addr + BIOS_ROM_DATA); +}
Hi, Jörg Fischer schrieb:
here is the patch for RTL1839 based NICs.
And here is the second version, which works. It should be applied to a clean svn, without my first patch.
Still got some problems:
- Those Nics can have a wide varity of PCI (Vendor) IDs.
.. which are not yet in the code.
- Code is instable, "erase" fails but "read" reads only FFs.
Fixed. Must set nCS to "1" after reading a byte...
It is disabled by default in the Makefile.
And another point: I read somewhere that RTL8139D and later Chips may not have Flash Writing capability anymore. Read: no newer Cards :-(
Regards, Jörg Fischer
Signed-off-by: Joerg Fischer turboj@gmx.de
Index: flash.h =================================================================== --- flash.h (Revision 999) +++ flash.h (Arbeitskopie) @@ -46,6 +46,10 @@ #if NIC3COM_SUPPORT == 1 PROGRAMMER_NIC3COM, #endif +#if NICREALTEK_SUPPORT == 1 + PROGRAMMER_NICREALTEK, + PROGRAMMER_NICREALTEK2, +#endif #if GFXNVIDIA_SUPPORT == 1 PROGRAMMER_GFXNVIDIA, #endif @@ -330,7 +334,7 @@ /* print.c */ char *flashbuses_to_text(enum chipbustype bustype); void print_supported(void); -#if (NIC3COM_SUPPORT == 1) || (GFXNVIDIA_SUPPORT == 1) || (DRKAISER_SUPPORT == 1) || (SATASII_SUPPORT == 1) || (ATAHPT_SUPPORT == 1) +#if (NIC3COM_SUPPORT == 1) || (GFXNVIDIA_SUPPORT == 1) || (DRKAISER_SUPPORT == 1) || (SATASII_SUPPORT == 1) || (ATAHPT_SUPPORT == 1) || (NICREALTEK_SUPPORT == 1) void print_supported_pcidevs(struct pcidev_status *devs); #endif void print_supported_wiki(void); @@ -462,6 +466,18 @@ extern struct pcidev_status drkaiser_pcidev[]; #endif
+/* nicrealtek.c */ +#if NICREALTEK_SUPPORT == 1 +int nicrealtek_init(void); +int nicsmc1211_init(void); +int nicrealtek_shutdown(void); +void nicrealtek_chip_writeb(uint8_t val, chipaddr addr); +uint8_t nicrealtek_chip_readb(const chipaddr addr); +extern struct pcidev_status nics_realtek[]; +extern struct pcidev_status nics_realteksmc1211[]; +#endif + + /* satasii.c */ #if SATASII_SUPPORT == 1 int satasii_init(void); Index: flashrom.c =================================================================== --- flashrom.c (Revision 999) +++ flashrom.c (Arbeitskopie) @@ -47,13 +47,17 @@ * if more than one of them is selected. If only one is selected, it is clear * that the user wants that one to become the default. */ -#if NIC3COM_SUPPORT+GFXNVIDIA_SUPPORT+DRKAISER_SUPPORT+SATASII_SUPPORT+ATAHPT_SUPPORT+FT2232_SPI_SUPPORT+SERPROG_SUPPORT+BUSPIRATE_SPI_SUPPORT+DEDIPROG_SUPPORT > 1 +#if NIC3COM_SUPPORT+GFXNVIDIA_SUPPORT+DRKAISER_SUPPORT+SATASII_SUPPORT+ATAHPT_SUPPORT+FT2232_SPI_SUPPORT+SERPROG_SUPPORT+BUSPIRATE_SPI_SUPPORT+DEDIPROG_SUPPORT+NICREALTEK_SUPPORT > 1 #error Please enable either CONFIG_DUMMY or CONFIG_INTERNAL or disable support for all external programmers except one. #endif enum programmer programmer = #if NIC3COM_SUPPORT == 1 PROGRAMMER_NIC3COM #endif +#if NICREALTEK_SUPPORT == 1 + PROGRAMMER_NICREALTEK + PROGRAMMER_NICREALTEK2 +#endif #if GFXNVIDIA_SUPPORT == 1 PROGRAMMER_GFXNVIDIA #endif @@ -159,6 +163,42 @@ }, #endif
+#if NICREALTEK_SUPPORT == 1 + { + .name = "nicrealtek", + .init = nicrealtek_init, + .shutdown = nicrealtek_shutdown, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .chip_readb = nicrealtek_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = nicrealtek_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, + .delay = internal_delay, + }, + { + .name = "nicsmc1211", + .init = nicsmc1211_init, + .shutdown = nicrealtek_shutdown, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .chip_readb = nicrealtek_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = nicrealtek_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, + .delay = internal_delay, + }, +#endif + + #if GFXNVIDIA_SUPPORT == 1 { .name = "gfxnvidia", Index: Makefile =================================================================== --- Makefile (Revision 999) +++ Makefile (Arbeitskopie) @@ -110,6 +110,9 @@ # Always enable Dr. Kaiser for now. CONFIG_DRKAISER ?= yes
+# Disable Realtek NICs for now, not working correctly. +CONFIG_NICREALTEK ?= no + # Always enable Bus Pirate SPI for now. CONFIG_BUSPIRATESPI ?= yes
@@ -181,6 +184,14 @@ NEED_PCI := yes endif
+ +ifeq ($(CONFIG_NICREALTEK), yes) +FEATURE_CFLAGS += -D'NICREALTEK_SUPPORT=1' +PROGRAMMER_OBJS += nicrealtek.o +NEED_PCI := yes +endif + + ifeq ($(CONFIG_BUSPIRATESPI), yes) FEATURE_CFLAGS += -D'BUSPIRATE_SPI_SUPPORT=1' PROGRAMMER_OBJS += buspirate_spi.o Index: nicrealtek.c =================================================================== --- nicrealtek.c (Revision 0) +++ nicrealtek.c (Revision 0) @@ -0,0 +1,89 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009 TURBO J turboj@gmx.de + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdlib.h> +#include <string.h> +#include <sys/types.h> +#include "flash.h" + +#define PCI_VENDOR_ID_REALTEK 0x10ec +#define PCI_VENDOR_ID_SMC1211 0x1113 + +#define BIOS_ROM_ADDR 0xD4 +#define BIOS_ROM_DATA 0xD7 + +struct pcidev_status nics_realtek[] = { + {0x10ec, 0x8139, OK, "Realtek","rtl8139b/c PCI 10/100 Mbps"}, + {}, +}; + +struct pcidev_status nics_realteksmc1211[] = { + {0x1113, 0x1211, OK, "SMC", "SMC 1211TX rtl8139 clone 10/100 Mbps"}, + {} +}; + + +int nicrealtek_init(void) +{ + get_io_perms(); + io_base_addr = pcidev_init(PCI_VENDOR_ID_REALTEK, PCI_BASE_ADDRESS_0, + nics_realtek, programmer_param); + + buses_supported = CHIP_BUSTYPE_PARALLEL; + + return 0; +} + + +int nicsmc1211_init(void) +{ + get_io_perms(); + io_base_addr = pcidev_init(PCI_VENDOR_ID_SMC1211, PCI_BASE_ADDRESS_0, + nics_realteksmc1211, programmer_param); + + buses_supported = CHIP_BUSTYPE_PARALLEL; + + return 0; +} + +int nicrealtek_shutdown(void) +{ + free(programmer_param); + pci_cleanup(pacc); + release_io_perms(); + return 0; +} + +void nicrealtek_chip_writeb(uint8_t val, chipaddr addr) +{ + OUTL(((uint32_t)addr &0x01FFFF)|0x0A0000| (val << 24), io_base_addr + BIOS_ROM_ADDR); + OUTL(((uint32_t)addr &0x01FFFF)|0x1E0000| (val << 24), io_base_addr + BIOS_ROM_ADDR); +} + +uint8_t nicrealtek_chip_readb(const chipaddr addr) + +{ + uint8_t val=INB(io_base_addr + BIOS_ROM_DATA); + OUTL(((uint32_t)addr & 0x01FFFF) | 0x060000 | (val << 24), io_base_addr + BIOS_ROM_ADDR); + val=INB(io_base_addr + BIOS_ROM_DATA); + OUTL(((uint32_t)addr & 0x01FFFF) | 0x1E0000 | (val << 24), io_base_addr + BIOS_ROM_ADDR); + return val ; + +}
Hi Jörg,
thank you for the patch.
On 19.05.2010 01:51, Jörg Fischer wrote:
Jörg Fischer schrieb:
here is the patch for RTL1839 based NICs.
And here is the second version, which works. It should be applied to a clean svn, without my first patch.
Still got some problems:
- Those Nics can have a wide varity of PCI (Vendor) IDs.
.. which are not yet in the code.
We can add those later as they show up.
- Code is instable, "erase" fails but "read" reads only FFs.
Fixed. Must set nCS to "1" after reading a byte...
It is disabled by default in the Makefile.
Should we still disable it by default? You said it works now, and all working drivers should be enabled by default IMHO.
And another point: I read somewhere that RTL8139D and later Chips may not have Flash Writing capability anymore. Read: no newer Cards :-(
That's unfortunate, but now we can support at least those chips which can write.
I noticed the double init functions caused by a suboptimal interface of pcidev_init. I will change that later, but for now your patch will get merged as is.
Signed-off-by: Joerg Fischer turboj@gmx.de
Acked-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Is it intentional that the copyright says "TURBO J"? I think your drkaiser driver has your name in the copyright line.
I'll commit shortly after 0.9.2 is out (which will happen tomorrow if I can get some Acks for that release.)
Regards, Carl-Daniel
Hi, Carl-Daniel Hailfinger schrieb:
Hi Jörg,
thank you for the patch.
On 19.05.2010 01:51, Jörg Fischer wrote:
Jörg Fischer schrieb:
here is the patch for RTL1839 based NICs.
And here is the second version, which works. It should be applied to a clean svn, without my first patch.
And here is the 3rd...
It is disabled by default in the Makefile.
Should we still disable it by default? You said it works now, and all working drivers should be enabled by default IMHO.
Was a bit surprised that I got it working... But yes, it is enabled now.
And another point: I read somewhere that RTL8139D and later Chips may not have Flash Writing capability anymore. Read: no newer Cards :-(
That's unfortunate, but now we can support at least those chips which can write.
FYI: The cards that can and the cards that cannot write may have the very same PCI ID.
I noticed the double init functions caused by a suboptimal interface of pcidev_init. I will change that later, but for now your patch will get merged as is.
Another thing that came to my mind: There may be multiple "Cards" with the same PCI ID, and I have not found a way to select one (e.g. via command line paramater) in this case. One set of Mainboards I saw has one RTL chip onboard, but for flash I wanted to use the external card.
Is it intentional that the copyright says "TURBO J"? I think your drkaiser driver has your name in the copyright line.
No, it should have read "Joerg Fischer turboj@gmx.de", sorry.
Corrected patch is attached.
-- Jörg Fischer
Signed-off-by: Joerg Fischer turboj@gmx.de
Index: flash.h =================================================================== --- flash.h (Revision 999) +++ flash.h (Arbeitskopie) @@ -46,6 +46,10 @@ #if NIC3COM_SUPPORT == 1 PROGRAMMER_NIC3COM, #endif +#if NICREALTEK_SUPPORT == 1 + PROGRAMMER_NICREALTEK, + PROGRAMMER_NICREALTEK2, +#endif #if GFXNVIDIA_SUPPORT == 1 PROGRAMMER_GFXNVIDIA, #endif @@ -330,7 +334,7 @@ /* print.c */ char *flashbuses_to_text(enum chipbustype bustype); void print_supported(void); -#if (NIC3COM_SUPPORT == 1) || (GFXNVIDIA_SUPPORT == 1) || (DRKAISER_SUPPORT == 1) || (SATASII_SUPPORT == 1) || (ATAHPT_SUPPORT == 1) +#if (NIC3COM_SUPPORT == 1) || (GFXNVIDIA_SUPPORT == 1) || (DRKAISER_SUPPORT == 1) || (SATASII_SUPPORT == 1) || (ATAHPT_SUPPORT == 1) || (NICREALTEK_SUPPORT == 1) void print_supported_pcidevs(struct pcidev_status *devs); #endif void print_supported_wiki(void); @@ -462,6 +466,18 @@ extern struct pcidev_status drkaiser_pcidev[]; #endif
+/* nicrealtek.c */ +#if NICREALTEK_SUPPORT == 1 +int nicrealtek_init(void); +int nicsmc1211_init(void); +int nicrealtek_shutdown(void); +void nicrealtek_chip_writeb(uint8_t val, chipaddr addr); +uint8_t nicrealtek_chip_readb(const chipaddr addr); +extern struct pcidev_status nics_realtek[]; +extern struct pcidev_status nics_realteksmc1211[]; +#endif + + /* satasii.c */ #if SATASII_SUPPORT == 1 int satasii_init(void); Index: flashrom.c =================================================================== --- flashrom.c (Revision 999) +++ flashrom.c (Arbeitskopie) @@ -47,13 +47,17 @@ * if more than one of them is selected. If only one is selected, it is clear * that the user wants that one to become the default. */ -#if NIC3COM_SUPPORT+GFXNVIDIA_SUPPORT+DRKAISER_SUPPORT+SATASII_SUPPORT+ATAHPT_SUPPORT+FT2232_SPI_SUPPORT+SERPROG_SUPPORT+BUSPIRATE_SPI_SUPPORT+DEDIPROG_SUPPORT > 1 +#if NIC3COM_SUPPORT+GFXNVIDIA_SUPPORT+DRKAISER_SUPPORT+SATASII_SUPPORT+ATAHPT_SUPPORT+FT2232_SPI_SUPPORT+SERPROG_SUPPORT+BUSPIRATE_SPI_SUPPORT+DEDIPROG_SUPPORT+NICREALTEK_SUPPORT > 1 #error Please enable either CONFIG_DUMMY or CONFIG_INTERNAL or disable support for all external programmers except one. #endif enum programmer programmer = #if NIC3COM_SUPPORT == 1 PROGRAMMER_NIC3COM #endif +#if NICREALTEK_SUPPORT == 1 + PROGRAMMER_NICREALTEK + PROGRAMMER_NICREALTEK2 +#endif #if GFXNVIDIA_SUPPORT == 1 PROGRAMMER_GFXNVIDIA #endif @@ -159,6 +163,42 @@ }, #endif
+#if NICREALTEK_SUPPORT == 1 + { + .name = "nicrealtek", + .init = nicrealtek_init, + .shutdown = nicrealtek_shutdown, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .chip_readb = nicrealtek_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = nicrealtek_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, + .delay = internal_delay, + }, + { + .name = "nicsmc1211", + .init = nicsmc1211_init, + .shutdown = nicrealtek_shutdown, + .map_flash_region = fallback_map, + .unmap_flash_region = fallback_unmap, + .chip_readb = nicrealtek_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = nicrealtek_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, + .delay = internal_delay, + }, +#endif + + #if GFXNVIDIA_SUPPORT == 1 { .name = "gfxnvidia", Index: Makefile =================================================================== --- Makefile (Revision 999) +++ Makefile (Arbeitskopie) @@ -110,6 +110,9 @@ # Always enable Dr. Kaiser for now. CONFIG_DRKAISER ?= yes
+# Always enable Realtek NICs for now. +CONFIG_NICREALTEK ?= yes + # Always enable Bus Pirate SPI for now. CONFIG_BUSPIRATESPI ?= yes
@@ -181,6 +184,14 @@ NEED_PCI := yes endif
+ +ifeq ($(CONFIG_NICREALTEK), yes) +FEATURE_CFLAGS += -D'NICREALTEK_SUPPORT=1' +PROGRAMMER_OBJS += nicrealtek.o +NEED_PCI := yes +endif + + ifeq ($(CONFIG_BUSPIRATESPI), yes) FEATURE_CFLAGS += -D'BUSPIRATE_SPI_SUPPORT=1' PROGRAMMER_OBJS += buspirate_spi.o Index: nicrealtek.c =================================================================== --- nicrealtek.c (Revision 0) +++ nicrealtek.c (Revision 0) @@ -0,0 +1,89 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009 Joerg Fischer turboj@gmx.de + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdlib.h> +#include <string.h> +#include <sys/types.h> +#include "flash.h" + +#define PCI_VENDOR_ID_REALTEK 0x10ec +#define PCI_VENDOR_ID_SMC1211 0x1113 + +#define BIOS_ROM_ADDR 0xD4 +#define BIOS_ROM_DATA 0xD7 + +struct pcidev_status nics_realtek[] = { + {0x10ec, 0x8139, OK, "Realtek","rtl8139b/c PCI 10/100 Mbps"}, + {}, +}; + +struct pcidev_status nics_realteksmc1211[] = { + {0x1113, 0x1211, OK, "SMC", "SMC 1211TX rtl8139 clone 10/100 Mbps"}, + {} +}; + + +int nicrealtek_init(void) +{ + get_io_perms(); + io_base_addr = pcidev_init(PCI_VENDOR_ID_REALTEK, PCI_BASE_ADDRESS_0, + nics_realtek, programmer_param); + + buses_supported = CHIP_BUSTYPE_PARALLEL; + + return 0; +} + + +int nicsmc1211_init(void) +{ + get_io_perms(); + io_base_addr = pcidev_init(PCI_VENDOR_ID_SMC1211, PCI_BASE_ADDRESS_0, + nics_realteksmc1211, programmer_param); + + buses_supported = CHIP_BUSTYPE_PARALLEL; + + return 0; +} + +int nicrealtek_shutdown(void) +{ + free(programmer_param); + pci_cleanup(pacc); + release_io_perms(); + return 0; +} + +void nicrealtek_chip_writeb(uint8_t val, chipaddr addr) +{ + OUTL(((uint32_t)addr &0x01FFFF)|0x0A0000| (val << 24), io_base_addr + BIOS_ROM_ADDR); + OUTL(((uint32_t)addr &0x01FFFF)|0x1E0000| (val << 24), io_base_addr + BIOS_ROM_ADDR); +} + +uint8_t nicrealtek_chip_readb(const chipaddr addr) + +{ + uint8_t val=INB(io_base_addr + BIOS_ROM_DATA); + OUTL(((uint32_t)addr & 0x01FFFF) | 0x060000 | (val << 24), io_base_addr + BIOS_ROM_ADDR); + val=INB(io_base_addr + BIOS_ROM_DATA); + OUTL(((uint32_t)addr & 0x01FFFF) | 0x1E0000 | (val << 24), io_base_addr + BIOS_ROM_ADDR); + return val ; + +}
On 19/05/10 13:59, Jörg Fischer wrote:
Hi, Carl-Daniel Hailfinger schrieb:
Hi Jörg,
thank you for the patch.
On 19.05.2010 01:51, Jörg Fischer wrote:
Jörg Fischer schrieb:
here is the patch for RTL1839 based NICs.
And here is the second version, which works. It should be applied to a clean svn, without my first patch.
And here is the 3rd...
Hi,
I've applied your patch and have apparently successfully read an AT27C512-25DI 28-pin EPROM chip using the following command: flashrom -p nicrealtek -c AT29C512 -r radio.rom -f Extracted data is here: http://ubuntuone.com/p/4dO/ The contents of radio.rom look to me like what I would expect to find on a ROM, code/data at the top, lots of 0xFF at the end plus a short name very near the end. As I don't have anything to compare it to that's about the best I can say. Not very technical I know. :) Reading again after reboot and hot-swapping ROM chips got me the same data. It should contain 80C31 code, but I don't know how to check if it looks right or not.
Reading with no chip in the socket gets me a file containing nothing but 0x00.
Card is MRI-PCI/100/R REV.B1-11 with RTL8139B chip on board.
I can't say for sure due to limited resources, but it looks to me like it is working... :)
Hi,
On 21.05.2010 06:08, Andrew Morgan wrote:
On 19/05/10 13:59, Jörg Fischer wrote:
Carl-Daniel Hailfinger schrieb:
On 19.05.2010 01:51, Jörg Fischer wrote:
Jörg Fischer schrieb:
here is the patch for RTL1839 based NICs.
And here is the 3rd...
I've applied your patch and have apparently successfully read an AT27C512-25DI 28-pin EPROM chip using the following command: flashrom -p nicrealtek -c AT29C512 -r radio.rom -f Extracted data is here: http://ubuntuone.com/p/4dO/ The contents of radio.rom look to me like what I would expect to find on a ROM, code/data at the top, lots of 0xFF at the end plus a short name very near the end. As I don't have anything to compare it to that's about the best I can say. Not very technical I know. :) Reading again after reboot and hot-swapping ROM chips got me the same data. It should contain 80C31 code, but I don't know how to check if it looks right or not.
Reading with no chip in the socket gets me a file containing nothing but 0x00.
Card is MRI-PCI/100/R REV.B1-11 with RTL8139B chip on board.
I can't say for sure due to limited resources, but it looks to me like it is working... :)
Thanks, committed in r1002+r1003 (I forgot svn add in r1002).
Regards, Carl-Daniel