flashrom

flashrom@flashrom.org

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9153 discussions

Reg:libmtd: error!: MEMERASE64 ioctl failed for eraseblocks (mtd0)
by Arvind GP 16 Dec '24

16 Dec '24

Hi All, We are trying to implement the flashrom tool utility on the x86 Elkhart Lake(LEC-EL) platform. In this case, we are facing an issue when trying to erase the BIOS device MTD0. There are 4096 erase blocks available in the mtd0 device, but only 1791 erase blocks we can erase; the remaining blocks are throwing errors, and it shows MEMERASE64 IOCTL FAILED. Please see the below error message and MTD0 device info for your reference. NOTE: Sometimes it works; we can erase the MTD0 device without any error, and we can upgrade/downgrade the BIOS. ERROR MESSAGAE: #sudo flash_erase /dev/mtd0 0 0 Erasing 16384 Kibyte @ 0 -- 0 % complete libmtd: error!: MEMERASE64 ioctl failed for eraseblock 0 (mtd0) error 524 (Unknown error 524) flash_erase: error!: Entering into mtd_erase_multi flash_erase: error!: /dev/mtd0: MTD Erase entire chip failureTrying one by one each sector. error 524 (Unknown error 524) Erasing 4 Kibyte @ 700000 -- 43 % complete libmtd: error!: MEMERASE64 ioctl failed for eraseblock 1792 (mtd0) error 5 (Input/output error) flash_erase: error!: /dev/mtd0: MTD Erase failure error 5 (Input/output error) Erasing 4 Kibyte @ 700000 -- 43 % complete cnt 4096 MTD0 INFO:(sudo mtdinfo /dev/mtd0) Name: BIOS Туре: nor Eraseblock size: 4096 bytes, 4.0 KiB Amount of eraseblocks: 4096 (16777216 bytes, 16.0 MB) Minimum input/output unit size: 1 byte Sub-page size: 1 byte Character device major/minor: 90:0 Bad blocks are allowed: false Device is writable: true Please share your inputs on this. Thanks & Regards, Arvind G P.

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request for support programmer with ch341b
by S. 13 Dec '24

13 Dec '24

flashrom supports only programmers with ch341a, but many programmers sold now have ch341b onboard, pid:vid is then 1a86:5523 tnx in advance Stephan

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HP 11MK G9EE - M44236-001 - "W25Q64JW...M"
by Tim Tech 07 Dec '24

07 Dec '24

Hello, attached are two text documents: output from --wp-disable and output from erase/write - let me know if any other information is needed. Chip in question is "W25Q64JW...M" Thanks, Tim

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Splitting flashchips.c
by Anastasia Klimchuk 06 Dec '24

06 Dec '24

Good day, I wanted to confirm that we are splitting flashchips.c file into separate files per vendor. flashchips.c will still stay in the source code but it will be much smaller and will only contain "generic" chip entries. The patch is here: https://review.coreboot.org/c/flashrom/+/83307 , it will be submitted after v1.5.0 tag is done. The patch will not be included in v1.5.0 release. There will be no changes to the usage, and everything that's supported stays the same. If you are a flashrom user who does not look into source code: this does not affect you at all. If you are working on adding support for a chip model: when the patch is submitted (I will post again) you will need to copy your code from flashchips.c into a vendor-specific file. Thank you! -- Anastasia.

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flashrom release v1.5.0 is out
by Anastasia Klimchuk 05 Dec '24

05 Dec '24

Good day everyone, flashrom release v1.5.0 is out! Tarball: https://download.flashrom.org/releases/flashrom-v1.5.0.tar.xz Signature: https://download.flashrom.org/releases/flashrom-v1.5.0.tar.xz.asc Fingerprint: 6E6E F9A0 BA47 8006 E277 6E4C C037 BB41 3134 D111 Checkout from git repository at https://review.coreboot.org/flashrom.git (tag v1.5.0) Release notes published: https://flashrom.org/release_notes/v_1_5.html It has been only 4 months since previous v1.4.0, and yet we have 91 commits made by 24 authors! Release notes explain the details of what was done, and thanks heaps to all the people who did it, reviewed it, and helped in any way <3 All the patches that have been ready and waiting, will be submitted very soon. -- Anastasia.

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release v1.5.0 plan and timeline
by Anastasia Klimchuk 29 Nov '24

29 Nov '24

Good day everyone, We are doing one more release this year! It's a smaller scope than the previous one, but will contain some important things. We now have a document describing release process in details: https://flashrom.org/dev_guide/release_process.html so I will just tell the dates: 15 November: tagging v1.5.0-rc1 6 December: tagging the release v1.5.0 Between 15 November and 6 December we are focused on testing and bugfixing, so no new features will be submitted during that time. The patches can still be pushed and reviewed, but submit will need to wait for after we tag v1.5.0 (ETA 6 December). Bugfixes will be submitted as usual. Any help with buildind/testing/bugfixing is very much appreciated! https://flashrom.org/how_to_support_flashrom.html#building-and-testing-1 What's included in the next release? We now have a document which accumulates info about recent development (for any next release): https://flashrom.org/release_notes/devel.html It's not full final release notes, some things might be missing: for example I will soon add the "Bugs fixed" section there. Lastly, we plan to split flashchips.c into separate smaller files per vendor. The file grew huge, and it's time to split. To minimise the disruption for contributors who are adding support for new chip models, we plan to do this between 15 November and 6 December, when there are less contributions. This work will be submitted only after v1.5.0 tag. -- Anastasia.

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(no subject)
by Djkds Jsjks 21 Nov '24

21 Nov '24

sudo flashrom -VV [plus the -p/--programmer parameter] flashrom 1.4.0 on Linux 6.6.54-current-sunxi64 (aarch64) flashrom is free software, get the source code at https://flashrom.org Error: Unknown programmer "/--programmer". Valid choices are: internal, dummy, gfxnvidia, raiden_debug_spi, drkaiser, satasii, asm106x, atavia, it8212, ft2232_spi, serprog, buspirate_spi, dediprog, developerbox, pony_spi, nicintel, nicintel_spi, nicintel_eeprom, ogp_spi, linux_mtd, linux_spi, usbblaster_spi, pickit2_spi, ch341a_spi, ch347_spi, digilent_spi, jlink_spi, stlinkv3_spi, dirtyjtag_spi. Please run "flashrom --help" for usage info.

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FAILED: Lenovo 300e G4
by John Trimble 15 Nov '24

15 Nov '24

Hello, I can not disable write protect with flashrom on these devices. It keeps saying, "unknown WP error" or "Your flash chip is in an unknown state". Any information would be helpful. Thank you, John

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Subject: Issue with flashrom on AMD FP4 chipset and unrecognized SMBus revision
by DAVID GOMEZ CRUZ 12 Nov '24

12 Nov '24

Dear flashrom team, I am encountering an issue when trying to use flashrom on a system with an AMD FP4 chipset. Upon attempting to access the flash memory, I receive the following error messages: flashrom v1.2 on Linux 6.4.0-150600.23.25-default (x86_64) flashrom is free software, get the source code at https://flashrom.org Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns). Found chipset "AMD FP4". Enabling flash write... Disabling read write protection of flash addresses from 0xfffff800 to 0x0007f7ff failed. Disabling read write protection of flash addresses from 0xfffff800 to 0x0007f7ff failed. Disabling read write protection of flash addresses from 0xfffff800 to 0x0007f7ff failed. Disabling read write protection of flash addresses from 0xfffff800 to 0x0007f7ff failed. FCH device found but SMBus revision 0x71 does not match known values. Please report this to flashrom(a)flashrom.org and include this log and the output of lspci -nnvx, thanks!. Could not determine chipset generation. PROBLEMS, continuing anyway No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. I have attached the lspci_output.txt file with the full output from the lspci -nnvx command, as suggested by the error message. I am seeking a solution to access the flash memory for reading or writing, but it appears that my chipset and SMBus revision may not be fully supported or recognized by flashrom. I would greatly appreciate any guidance or solutions you can provide. Thank you for your attention and for the excellent work on flashrom. I look forward to your response. Best regards, David

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RPMC feature addition for v1.5
by Matti Finder 11 Nov '24

11 Nov '24

Hello, Over the last few weeks I have been adding support for the Replay protected monotonic counter commands to flashrom. Their functionality is defined in the JESD260 specification [1]. Currently they only work by manually setting the flash chip to use SFDP-capable chip. This is done with `-c "SFDP-capable chip"`. This enables automatic feature detection by parsing the corresponding SFDP-table. If you want to enable this new feature on supporting flashchips, this is done by setting the FEATURE_FLASH_HARDENING bit and then setting the correct values within the rpmc_ctx struct. Usage of the commands is explained here [2]. They just made the cutoff and so this new feature will be a part of flashrom v1.5. Best Regards, Matti. [1] https://www.jedec.org/standards-documents/docs/jesd260 [2] https://www.flashrom.org/classic_cli_manpage.html#rpmc-commands

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