[PATCH] Make satasii driver more robust

[David Borg]

Sorry, forgot to CC.the list.

Updated patch to apply cleanly against latest revision (1151) and
changed the string as pointed out by Rudolf Marek.

Regards,
David
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> Hi thanks for doing that.
>
> Carl-Daniel Hailfinger wrote:
> > Make the satasii driver more robust.
> >
> > Untested.
> >
> > Signed-off-by: Carl-Daniel Hailfinger
> > Index: flashrom-satasii_robust/satasii.c
> >
> > --- flashrom-satasii_robust/satasii.c (Revision 1005)
> > +++ flashrom-satasii_robust/satasii.c (Arbeitskopie)
> > @@ -44,6 +44,7 @@
> >  {
> >       uint32_t addr;
> >       uint16_t reg_offset;
> > uint32_t tmp;
> >
> > get_io_perms();
> >
> > @@ -59,12 +60,19 @@
> >               reg_offset = 0x50;
> >       }
> > sii_bar = physmap("SATA SIL registers", addr, 0x100) + reg_offset;
> > sii_bar = physmap("SATA SiI registers", addr, 0x100) + reg_offset;
> >
> > /* Check if ROM cycle are OK. */
> >       if ((id != 0x0680) && (!(mmio_readl(sii_bar) & (1 << 26))))
> >               msg_pinfo("Warning: Flash seems unconnected.\n");
> > msg_pdbg("Using BAR5 access method.\n");
> > tmp = pci_read_long(pcidev_dev, 0x40) & (1 << 1);
> > msg_pdbg("BAR5 Indirect Access is %snabled\n", tmp ? "en" : "dis");
> > /* This bit has contradicting definitions in the 3512 datasheet. */
>
> this looks strange you get dissnabled or ensabled ;)
> > tmp = pci_read_long(pcidev_dev, 0x88) & (1 << 16);
> > msg_pdbg("BAR5 Access is %snabled\n", tmp ? "en" : "dis");
>
> This Reg is EN_66 in other controllers so I guess it just this and not the
> BA5_EN. It looks like it is driven by strap resistor only anyway.
>
> Interesting would be to test if BA5_EN is not enabled if you can access it
> through indirect access through C0/C4 regs.
>
> Thanks,
> Rudolf
> > buses_supported = CHIP_BUSTYPE_PARALLEL;
> >
> > return 0;
> > @@ -81,6 +89,7 @@
> >  void satasii_chip_writeb(uint8_t val, chipaddr addr)
> >  {
> >       uint32_t ctrl_reg, data_reg;
> > int i = 0;
> >
> > while ((ctrl_reg = mmio_readl(sii_bar)) & (1 << 25)) ;
> >
> > @@ -92,12 +101,19 @@
> >       mmio_writel(data_reg, (sii_bar + 4));
> >       mmio_writel(ctrl_reg, sii_bar);
> > while (mmio_readl(sii_bar) & (1 << 25)) ;
> > while (mmio_readl(sii_bar) & (1 << 25)) {
> > if (++i > 10000) {
> > msg_perr("%s: control reg stuck at %08x, aborting\n",
> > __func__, mmio_readl(sii_bar));
> > break;
> > }
> > }
> >
> > }
> >
> > uint8_t satasii_chip_readb(const chipaddr addr)
> >  {
> >       uint32_t ctrl_reg;
> > int i = 0;
> >
> > while ((ctrl_reg = mmio_readl(sii_bar)) & (1 << 25)) ;
> >
> > @@ -107,7 +123,13 @@
> >
> > mmio_writel(ctrl_reg, sii_bar);
> > while (mmio_readl(sii_bar) & (1 << 25)) ;
> > while (mmio_readl(sii_bar) & (1 << 25)) {
> > if (++i > 10000) {
> > msg_perr("%s: control reg stuck at %08x, aborting\n",
> > __func__, mmio_readl(sii_bar));
> > break;
> > }
> > }
> >
> > return (mmio_readl(sii_bar + 4)) & 0xff;
> >  }
>
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[PATCH] Remove potential endless loops from satasii.c.

[Stefan Tauner]

This is based on the idea from the "Make satasii driver more robust" patch
Signed-off-by: Carl-Daniel Hailfinger

It is missing the BAR access changes, but factors out the wait loop and
replaces all endless loops instead of just a few.

Signed-off-by: Stefan Tauner 
---
i am not sure if we really want to ignore the hung status register.
Normally, i would have really aborted on timeouts, but since this was not
part of the original patch i kept the ignoring behavior.
---
 satasii.c |   27 +++++++++++++++++++--------
 1 file changed, 19 insertions(+), 8 deletions(-)

diff --git a/satasii.c b/satasii.c
index e210e10..a68a0c4 100644
--- a/satasii.c
+++ b/satasii.c
@@ -61,6 +61,20 @@ static int satasii_shutdown(void *data)
    return 0;
 }

+static uint32_t satasii_wait_done(void)
+{
+	uint32_t ctrl_reg;
+	int i = 0;
+	while ((ctrl_reg = pci_mmio_readl(sii_bar)) & (1 << 25)) {
+		if (++i > 10000) {
+			msg_perr("%s: control register stuck at %08x, ignoring.\n",
+				 __func__, pci_mmio_readl(sii_bar));
+			break;
+		}
+	}
+	return ctrl_reg;
+}
+
 int satasii_init(void)
 {
    uint32_t addr;
@@ -97,9 +111,8 @@ int satasii_init(void)

static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
 {
-	uint32_t ctrl_reg, data_reg;
-
-	while ((ctrl_reg = pci_mmio_readl(sii_bar)) & (1 << 25)) ;
+	uint32_t data_reg;
+	uint32_t ctrl_reg = satasii_wait_done();

/* Mask out unused/reserved bits, set writes and start transaction. */
    ctrl_reg &= 0xfcf80000;
@@ -109,14 +122,12 @@ static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val, chipa
    pci_mmio_writel(data_reg, (sii_bar + 4));
    pci_mmio_writel(ctrl_reg, sii_bar);

-	while (pci_mmio_readl(sii_bar) & (1 << 25)) ;
+	satasii_wait_done();
 }

static uint8_t satasii_chip_readb(const struct flashctx *flash, const chipaddr addr)
 {
-	uint32_t ctrl_reg;
-
-	while ((ctrl_reg = pci_mmio_readl(sii_bar)) & (1 << 25)) ;
+	uint32_t ctrl_reg = satasii_wait_done();

/* Mask out unused/reserved bits, set reads and start transaction. */
    ctrl_reg &= 0xfcf80000;
@@ -124,7 +135,7 @@ static uint8_t satasii_chip_readb(const struct flashctx *flash, const chipaddr a

pci_mmio_writel(ctrl_reg, sii_bar);

-	while (pci_mmio_readl(sii_bar) & (1 << 25)) ;
+	satasii_wait_done();

return (pci_mmio_readl(sii_bar + 4)) & 0xff;
 }