After last night, i was disgusted to such an extent that i went and did this code that should meet all the (at least) logical demands made earlier. And to think that this started with adding 1 more simple board enable (http://www.flashrom.org/pipermail/flashrom/2009-October/000750.html).
Some remarks here: * we do not care about the name of the intel ICH. ICH name was detected and mentioned before anyway. * we do not try to match a specific intel ICH in the board enable. That's what the big table was for to begin with. * This tiny 190 line function is entirely redone if we have a second io line that needs to be toggled. * dell poweredge: comment is useless, use the commit message. There might be a time when 50 boards might need exactly this gpio pin raised. * i might have messed up a bit or so in the gpio line checking masks, but cannot be bothered to go and trawl through everything yet again to verify this.
Feel free to go and correct capitalisation. I'm off to do some real code on unichrome.
Luc Verhaegen.
Hi Luc,
can you bounce/forward/... your mail to the users you had copied in your first mail so they can test? Thanks!
On 25.10.2009 18:58, Luc Verhaegen wrote:
After last night, i was disgusted to such an extent that i went and did this code that should meet all the (at least) logical demands made earlier. And to think that this started with adding 1 more simple board enable (http://www.flashrom.org/pipermail/flashrom/2009-October/000750.html).
Some remarks here:
- we do not care about the name of the intel ICH. ICH name was detected
and mentioned before anyway.
- we do not try to match a specific intel ICH in the board enable.
That's what the big table was for to begin with.
- This tiny 190 line function is entirely redone if we have a second
io line that needs to be toggled.
- dell poweredge: comment is useless, use the commit message. There
might be a time when 50 boards might need exactly this gpio pin raised.
- i might have messed up a bit or so in the gpio line checking masks,
but cannot be bothered to go and trawl through everything yet again to verify this.
I checked the old vs. the new code and it looks OK. There are some minor nitpicks, but I can send them as followup patch after this is merged.
Acked-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Regards, Carl-Daniel
2009/10/26 Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Hi Luc,
can you bounce/forward/... your mail to the users you had copied in your first mail so they can test? Thanks!
On 25.10.2009 18:58, Luc Verhaegen wrote:
After last night, i was disgusted to such an extent that i went and did this code that should meet all the (at least) logical demands made earlier. And to think that this started with adding 1 more simple board enable (http://www.flashrom.org/pipermail/flashrom/2009-October/000750.html).
Some remarks here:
- we do not care about the name of the intel ICH. ICH name was detected
and mentioned before anyway.
- we do not try to match a specific intel ICH in the board enable.
That's what the big table was for to begin with.
- This tiny 190 line function is entirely redone if we have a second
io line that needs to be toggled.
- dell poweredge: comment is useless, use the commit message. There
might be a time when 50 boards might need exactly this gpio pin raised.
- i might have messed up a bit or so in the gpio line checking masks,
but cannot be bothered to go and trawl through everything yet again to verify this.
I checked the old vs. the new code and it looks OK. There are some minor nitpicks, but I can send them as followup patch after this is merged.
Acked-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
http://patchwork.coreboot.org/patch/487/ Tested on real hardware.
Acked-by: Idwer Vollering vidwer@gmail.com
Regards, Carl-Daniel
-- Developer quote of the week: "We are juggling too many chainsaws and flaming arrows and tigers."
flashrom mailing list flashrom@flashrom.org http://www.flashrom.org/mailman/listinfo/flashrom
Hi everyone,
here's the latest version of Luc's patch. Some of us have already tested it and it works just fine. The patch is available for download at http://patchwork.coreboot.org/patch/487/raw/ .
If it works for you, please hit the "reply all" button in your mailer and add a line Acked-by: Your Name your@email
The easiest way to test is to read your chip to a file, erase the chip, then write the file back to the chip.
Some explanatory comments by Luc follow.
On 25.10.2009 18:58, Luc Verhaegen wrote:
Jonathan, can you verify this patch on your acorp 6A815EPD (preferably also with the previous patch)? Thanks for having replied that swiftly last time :)
Uwe, it seems that the Asus P4B266 is yours, the code was committed as r247. Can you send in an lspci -vvnnxxx to the list as well?
David, i would guess that the MSI MS-7046 is your board (original commit r414), can you go and verify this code on this hardware? We would like to have an lspci -vvnnxxx for this board too.
Stepan, it seems that you committed the kontron 986LCD-M board enable. Can you check whether this code still works with your board, and can you also provide an lspci -vvnnxxx? I would also like to get rid of the entry which just matches one pci devices, and the coreboot ids in the table.
Richie, can you give this code a spin on your Abit IP35? (original commit r642)
Bojan? Asus P4P800-E seems to be yours and it was added just under two months ago in r682. Can you give this code a run too?
Carl-Daniel Hailfinger wrote:
Ron, can you please send lspci -vvnnxxx for the Dell S1850 to this list?
Thanks to everyone for your cooperation, it helps us make flashrom better.
Regards, Carl-Daniel
On Sun, Oct 25, 2009 at 06:58:22PM +0100, Luc Verhaegen wrote:
Signed-off-by: Luc Verhaegen libv@skynet.be
Tested on ASUS P4B266, works fine.
Acked-by: Uwe Hermann uwe@hermann-uwe.de
lspci attached for reference.
Thanks, Uwe.
This was r788.
Regards, Carl-Daniel
On 14.12.2009 04:21, Carl-Daniel Hailfinger wrote:
This was r788.
Sorry, typo. r786.
Regards, Carl-Daniel
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Carl-Daniel Hailfinger -
Idwer Vollering -
Luc Verhaegen -
Uwe Hermann