Speed up RayeR SPIPGM driver in flashrom by a factor of 2.
Allow specification of an alternate base port with flashrom -p rayer_spi:lptport=0x278 Any port number is allowed as long as it is nonzero, below 65536 and a multiple of four.
Untested, should work.
Martin, this one should hopefully reach the speed of SPIPGM.exe for reads. I'll ask Idwer to provide a DOS binary for you.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Index: flashrom-bitbang_spi_rayer_faster/flashrom.8 =================================================================== --- flashrom-bitbang_spi_rayer_faster/flashrom.8 (Revision 1093) +++ flashrom-bitbang_spi_rayer_faster/flashrom.8 (Arbeitskopie) @@ -394,7 +394,18 @@ (in Hz). The default is the maximum frequency of 8 MHz. .TP .BR "rayer_spi " programmer -No parameters defined yet. More information about the hardware is available at +The default I/O base address used for the parallel port is 0x378 and you can use +the optional +.B lptport +parameter to specify an alternate base I/O address with the +.sp +.B " flashrom -p rayer_spi:lptport=portnum" +.sp +syntax where +.B portnum +is the I/O port number of your parallel port which must be a multiple of 4. +.sp +More information about the hardware is available at http://rayer.ic.cz/elektro/spipgm.htm .SH EXIT STATUS flashrom exits with 0 on success, 1 on most failures but with 2 if /dev/mem Index: flashrom-bitbang_spi_rayer_faster/rayer_spi.c =================================================================== --- flashrom-bitbang_spi_rayer_faster/rayer_spi.c (Revision 1093) +++ flashrom-bitbang_spi_rayer_faster/rayer_spi.c (Arbeitskopie) @@ -30,6 +30,7 @@ */ #if defined(__i386__) || defined(__x86_64__)
+#include <stdlib.h> #include "flash.h"
/* We have two sets of pins, out and in. The numbers for both sets are @@ -42,7 +43,7 @@ /* Pins for slave->master direction */ #define SPI_MISO_PIN 6
-static int lpt_iobase; +static uint16_t lpt_iobase;
/* FIXME: All rayer_bitbang_set_* functions could use caching of the value * stored at port lpt_iobase to avoid unnecessary INB. In theory, only one @@ -50,37 +51,31 @@ * value. */
-void rayer_bitbang_set_cs(int val) +/* Cached value of last byte sent. */ +static uint8_t lpt_outval; + +static void rayer_bitbang_set_cs(int val) { - uint8_t tmp; - - tmp = INB(lpt_iobase); - tmp &= ~(1 << SPI_CS_PIN); - tmp |= (val << SPI_CS_PIN); - OUTB(tmp, lpt_iobase); + lpt_outval &= ~(1 << SPI_CS_PIN); + lpt_outval |= (val << SPI_CS_PIN); + OUTB(lpt_outval, lpt_iobase); }
-void rayer_bitbang_set_sck(int val) +static void rayer_bitbang_set_sck(int val) { - uint8_t tmp; - - tmp = INB(lpt_iobase); - tmp &= ~(1 << SPI_SCK_PIN); - tmp |= (val << SPI_SCK_PIN); - OUTB(tmp, lpt_iobase); + lpt_outval &= ~(1 << SPI_SCK_PIN); + lpt_outval |= (val << SPI_SCK_PIN); + OUTB(lpt_outval, lpt_iobase); }
-void rayer_bitbang_set_mosi(int val) +static void rayer_bitbang_set_mosi(int val) { - uint8_t tmp; - - tmp = INB(lpt_iobase); - tmp &= ~(1 << SPI_MOSI_PIN); - tmp |= (val << SPI_MOSI_PIN); - OUTB(tmp, lpt_iobase); + lpt_outval &= ~(1 << SPI_MOSI_PIN); + lpt_outval |= (val << SPI_MOSI_PIN); + OUTB(lpt_outval, lpt_iobase); }
-int rayer_bitbang_get_miso(void) +static int rayer_bitbang_get_miso(void) { uint8_t tmp;
@@ -99,16 +94,49 @@
int rayer_spi_init(void) { - /* Pick a default value for now. */ - lpt_iobase = 0x378; + char *portpos = NULL;
+ /* Non-default port requested? */ + portpos = extract_programmer_param("lptport"); + if (portpos) { + char *endptr = NULL; + unsigned long tmp; + tmp = strtoul(portpos, &endptr, 0); + /* Port 0, port >0x1000, unaligned ports and garbage strings + * are rejected. + */ + if (!tmp || (tmp >= 0x10000) || (tmp & 0x3) || + (*endptr != '\0')) { + /* Using ports below 0x100 is a really bad idea, and + * should only be done if no port between 0x100 and + * 0xfffc works due to routing issues. + */ + msg_perr("Error: lptport specified, but no valid " + "port specified.\nPort must be a multiple of " + "0x4 and lie between 0x100 and 0xfffc.\n"); + free(portpos); + return 1; + } else { + lpt_iobase = (uint16_t)tmp; + msg_pinfo("Non-default I/O base requested. This will " + "not change the hardware settings.\n"); + } + } else { + /* Pick a default value for the I/O base. */ + lpt_iobase = 0x378; + } + free(portpos); + msg_pdbg("Using port 0x%x as I/O base for parallel port access.\n", lpt_iobase);
get_io_perms();
- /* 1 usec halfperiod delay for now. */ - if (bitbang_spi_init(&bitbang_spi_master_rayer, 1)) + /* Get the initial value before writing to any line. */ + lpt_outval = INB(lpt_iobase); + + /* Zero halfperiod delay. */ + if (bitbang_spi_init(&bitbang_spi_master_rayer, 0)) return 1;
buses_supported = CHIP_BUSTYPE_SPI;
Am Mittwoch, den 21.07.2010, 13:51 +0200 schrieb Carl-Daniel Hailfinger:
Speed up RayeR SPIPGM driver in flashrom by a factor of 2.
Allow specification of an alternate base port with flashrom -p rayer_spi:lptport=0x278 Any port number is allowed as long as it is nonzero, below 65536 and a multiple of four.
Untested, should work.
Martin, this one should hopefully reach the speed of SPIPGM.exe for reads. I'll ask Idwer to provide a DOS binary for you.
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Basically I think this patch is OK.
+.B lptport +parameter to specify an alternate base I/O address with the +.sp +.B " flashrom -p rayer_spi:lptport=portnum" +.sp +syntax where +.B portnum +is the I/O port number of your parallel port which must be a multiple of 4.
Could you avoid using the term "port" for "I/O port number", but use something like "base address", "io address" or the like instead. Just to make double sure that people don't confuse the number of the "LPT port", namely "LPT1" with the I/O base address of typically 0x378.
So like
---- .B iobase parameter to specifiy an alternate base I/O address with the .sp .B " flashrom -p rayer_spi:iobase=baseaddr" .sp syntax where .B baseaddr is the base I/O address of the parallel port, which must be a multiple of four. Make sure to not forget the "0x" prefix for hexadecimal port addresses. ----
You can leave off the last sentence if you think it is redundant.
-void rayer_bitbang_set_cs(int val) +/* Cached value of last byte sent. */ +static uint8_t lpt_outval;
I would call it "lpt_databyte", but lpt_outval sounds good enough too. Pick whatever you like more.
tmp = strtoul(portpos, &endptr, 0);/* Port 0, port >0x1000, unaligned ports and garbage strings
cut&pasto. must be >= 0x10000
* are rejected.*/if (!tmp || (tmp >= 0x10000) || (tmp & 0x3) ||(*endptr != '\0')) {
Remaining stuff OK.
Regards, Michael Karcher
2010/7/21 Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Speed up RayeR SPIPGM driver in flashrom by a factor of 2.
Allow specification of an alternate base port with flashrom -p rayer_spi:lptport=0x278 Any port number is allowed as long as it is nonzero, below 65536 and a multiple of four.
Untested, should work.
Martin, this one should hopefully reach the speed of SPIPGM.exe for reads. I'll ask Idwer to provide a DOS binary for you.
http://khepri.coresystems.de/~idwer/flashrom/r1093-patchwork-1666/
Signed-off-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2006@gmx.net
Index: flashrom-bitbang_spi_rayer_faster/flashrom.8
--- flashrom-bitbang_spi_rayer_faster/flashrom.8 (Revision 1093) +++ flashrom-bitbang_spi_rayer_faster/flashrom.8 (Arbeitskopie) @@ -394,7 +394,18 @@ (in Hz). The default is the maximum frequency of 8 MHz. .TP .BR "rayer_spi " programmer -No parameters defined yet. More information about the hardware is available at +The default I/O base address used for the parallel port is 0x378 and you can use +the optional +.B lptport +parameter to specify an alternate base I/O address with the +.sp +.B " flashrom -p rayer_spi:lptport=portnum" +.sp +syntax where +.B portnum +is the I/O port number of your parallel port which must be a multiple of 4. +.sp +More information about the hardware is available at http://rayer.ic.cz/elektro/spipgm.htm .SH EXIT STATUS flashrom exits with 0 on success, 1 on most failures but with 2 if /dev/mem Index: flashrom-bitbang_spi_rayer_faster/rayer_spi.c =================================================================== --- flashrom-bitbang_spi_rayer_faster/rayer_spi.c (Revision 1093) +++ flashrom-bitbang_spi_rayer_faster/rayer_spi.c (Arbeitskopie) @@ -30,6 +30,7 @@ */ #if defined(__i386__) || defined(__x86_64__)
+#include <stdlib.h> #include "flash.h"
/* We have two sets of pins, out and in. The numbers for both sets are @@ -42,7 +43,7 @@ /* Pins for slave->master direction */ #define SPI_MISO_PIN 6
-static int lpt_iobase; +static uint16_t lpt_iobase;
/* FIXME: All rayer_bitbang_set_* functions could use caching of the value
- stored at port lpt_iobase to avoid unnecessary INB. In theory, only one
@@ -50,37 +51,31 @@
- value.
*/
-void rayer_bitbang_set_cs(int val) +/* Cached value of last byte sent. */ +static uint8_t lpt_outval;
+static void rayer_bitbang_set_cs(int val) {
uint8_t tmp;tmp = INB(lpt_iobase);tmp &= ~(1 << SPI_CS_PIN);tmp |= (val << SPI_CS_PIN);OUTB(tmp, lpt_iobase);
lpt_outval &= ~(1 << SPI_CS_PIN);lpt_outval |= (val << SPI_CS_PIN);OUTB(lpt_outval, lpt_iobase);}
-void rayer_bitbang_set_sck(int val) +static void rayer_bitbang_set_sck(int val) {
uint8_t tmp;tmp = INB(lpt_iobase);tmp &= ~(1 << SPI_SCK_PIN);tmp |= (val << SPI_SCK_PIN);OUTB(tmp, lpt_iobase);
lpt_outval &= ~(1 << SPI_SCK_PIN);lpt_outval |= (val << SPI_SCK_PIN);OUTB(lpt_outval, lpt_iobase);}
-void rayer_bitbang_set_mosi(int val) +static void rayer_bitbang_set_mosi(int val) {
uint8_t tmp;tmp = INB(lpt_iobase);tmp &= ~(1 << SPI_MOSI_PIN);tmp |= (val << SPI_MOSI_PIN);OUTB(tmp, lpt_iobase);
lpt_outval &= ~(1 << SPI_MOSI_PIN);lpt_outval |= (val << SPI_MOSI_PIN);OUTB(lpt_outval, lpt_iobase);}
-int rayer_bitbang_get_miso(void) +static int rayer_bitbang_get_miso(void) { uint8_t tmp;
@@ -99,16 +94,49 @@
int rayer_spi_init(void) {
/* Pick a default value for now. */lpt_iobase = 0x378;
char *portpos = NULL;/* Non-default port requested? */portpos = extract_programmer_param("lptport");if (portpos) {char *endptr = NULL;unsigned long tmp;tmp = strtoul(portpos, &endptr, 0);/* Port 0, port >0x1000, unaligned ports and garbagestrings
* are rejected.*/if (!tmp || (tmp >= 0x10000) || (tmp & 0x3) ||(*endptr != '\0')) {/* Using ports below 0x100 is a really bad idea,and
* should only be done if no port between 0x100 and* 0xfffc works due to routing issues.*/msg_perr("Error: lptport specified, but no valid ""port specified.\nPort must be a multipleof "
"0x4 and lie between 0x100 and0xfffc.\n");
free(portpos);return 1;} else {lpt_iobase = (uint16_t)tmp;msg_pinfo("Non-default I/O base requested. Thiswill "
"not change the hardware settings.\n");}} else {/* Pick a default value for the I/O base. */lpt_iobase = 0x378;}free(portpos);msg_pdbg("Using port 0x%x as I/O base for parallel port access.\n", lpt_iobase); get_io_perms();
/* 1 usec halfperiod delay for now. */if (bitbang_spi_init(&bitbang_spi_master_rayer, 1))
/* Get the initial value before writing to any line. */lpt_outval = INB(lpt_iobase);/* Zero halfperiod delay. */if (bitbang_spi_init(&bitbang_spi_master_rayer, 0)) return 1; buses_supported = CHIP_BUSTYPE_SPI;
flashrom mailing list flashrom@flashrom.org http://www.flashrom.org/mailman/listinfo/flashrom
Thanks, I'll try... Please could you place the dos binary to some stable loacation so i could link it from my web? M,
Idwer Vollering wrote:
2010/7/21 Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net mailto:c-d.hailfinger.devel.2006@gmx.net>
Speed up RayeR SPIPGM driver in flashrom by a factor of 2. Allow specification of an alternate base port with flashrom -p rayer_spi:lptport=0x278 Any port number is allowed as long as it is nonzero, below 65536 and a multiple of four. Untested, should work. Martin, this one should hopefully reach the speed of SPIPGM.exe for reads. I'll ask Idwer to provide a DOS binary for you.http://khepri.coresystems.de/~idwer/flashrom/r1093-patchwork-1666/ http://khepri.coresystems.de/%7Eidwer/flashrom/r1093-patchwork-1666/
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net <mailto:c-d.hailfinger.devel.2006@gmx.net>> Index: flashrom-bitbang_spi_rayer_faster/flashrom.8 =================================================================== --- flashrom-bitbang_spi_rayer_faster/flashrom.8 (Revision 1093) +++ flashrom-bitbang_spi_rayer_faster/flashrom.8 (Arbeitskopie) @@ -394,7 +394,18 @@ (in Hz). The default is the maximum frequency of 8 MHz. .TP .BR "rayer_spi " programmer -No parameters defined yet. More information about the hardware is available at +The default I/O base address used for the parallel port is 0x378 and you can use +the optional +.B lptport +parameter to specify an alternate base I/O address with the +.sp +.B " flashrom \-p rayer_spi:lptport=portnum" +.sp +syntax where +.B portnum +is the I/O port number of your parallel port which must be a multiple of 4. +.sp +More information about the hardware is available at http://rayer.ic.cz/elektro/spipgm.htm .SH EXIT STATUS flashrom exits with 0 on success, 1 on most failures but with 2 if /dev/mem Index: flashrom-bitbang_spi_rayer_faster/rayer_spi.c =================================================================== --- flashrom-bitbang_spi_rayer_faster/rayer_spi.c (Revision 1093) +++ flashrom-bitbang_spi_rayer_faster/rayer_spi.c (Arbeitskopie) @@ -30,6 +30,7 @@ */ #if defined(__i386__) || defined(__x86_64__) +#include <stdlib.h> #include "flash.h" /* We have two sets of pins, out and in. The numbers for both sets are @@ -42,7 +43,7 @@ /* Pins for slave->master direction */ #define SPI_MISO_PIN 6 -static int lpt_iobase; +static uint16_t lpt_iobase; /* FIXME: All rayer_bitbang_set_* functions could use caching of the value * stored at port lpt_iobase to avoid unnecessary INB. In theory, only one @@ -50,37 +51,31 @@ * value. */ -void rayer_bitbang_set_cs(int val) +/* Cached value of last byte sent. */ +static uint8_t lpt_outval; + +static void rayer_bitbang_set_cs(int val) { - uint8_t tmp; - - tmp = INB(lpt_iobase); - tmp &= ~(1 << SPI_CS_PIN); - tmp |= (val << SPI_CS_PIN); - OUTB(tmp, lpt_iobase); + lpt_outval &= ~(1 << SPI_CS_PIN); + lpt_outval |= (val << SPI_CS_PIN); + OUTB(lpt_outval, lpt_iobase); } -void rayer_bitbang_set_sck(int val) +static void rayer_bitbang_set_sck(int val) { - uint8_t tmp; - - tmp = INB(lpt_iobase); - tmp &= ~(1 << SPI_SCK_PIN); - tmp |= (val << SPI_SCK_PIN); - OUTB(tmp, lpt_iobase); + lpt_outval &= ~(1 << SPI_SCK_PIN); + lpt_outval |= (val << SPI_SCK_PIN); + OUTB(lpt_outval, lpt_iobase); } -void rayer_bitbang_set_mosi(int val) +static void rayer_bitbang_set_mosi(int val) { - uint8_t tmp; - - tmp = INB(lpt_iobase); - tmp &= ~(1 << SPI_MOSI_PIN); - tmp |= (val << SPI_MOSI_PIN); - OUTB(tmp, lpt_iobase); + lpt_outval &= ~(1 << SPI_MOSI_PIN); + lpt_outval |= (val << SPI_MOSI_PIN); + OUTB(lpt_outval, lpt_iobase); } -int rayer_bitbang_get_miso(void) +static int rayer_bitbang_get_miso(void) { uint8_t tmp; @@ -99,16 +94,49 @@ int rayer_spi_init(void) { - /* Pick a default value for now. */ - lpt_iobase = 0x378; + char *portpos = NULL; + /* Non-default port requested? */ + portpos = extract_programmer_param("lptport"); + if (portpos) { + char *endptr = NULL; + unsigned long tmp; + tmp = strtoul(portpos, &endptr, 0); + /* Port 0, port >0x1000, unaligned ports and garbage strings + * are rejected. + */ + if (!tmp || (tmp >= 0x10000) || (tmp & 0x3) || + (*endptr != '\0')) { + /* Using ports below 0x100 is a really bad idea, and + * should only be done if no port between 0x100 and + * 0xfffc works due to routing issues. + */ + msg_perr("Error: lptport specified, but no valid " + "port specified.\nPort must be a multiple of " + "0x4 and lie between 0x100 and 0xfffc.\n"); + free(portpos); + return 1; + } else { + lpt_iobase = (uint16_t)tmp; + msg_pinfo("Non-default I/O base requested. This will " + "not change the hardware settings.\n"); + } + } else { + /* Pick a default value for the I/O base. */ + lpt_iobase = 0x378; + } + free(portpos); + msg_pdbg("Using port 0x%x as I/O base for parallel port access.\n", lpt_iobase); get_io_perms(); - /* 1 usec halfperiod delay for now. */ - if (bitbang_spi_init(&bitbang_spi_master_rayer, 1)) + /* Get the initial value before writing to any line. */ + lpt_outval = INB(lpt_iobase); + + /* Zero halfperiod delay. */ + if (bitbang_spi_init(&bitbang_spi_master_rayer, 0)) return 1; buses_supported = CHIP_BUSTYPE_SPI; -- http://www.hailfinger.org/ _______________________________________________ flashrom mailing list flashrom@flashrom.org <mailto:flashrom@flashrom.org> http://www.flashrom.org/mailman/listinfo/flashrom
2010/7/21 rayer rayer@seznam.cz
Thanks, I'll try... Please could you place the dos binary to some stable loacation so i could link it from my web?
What exactly is unstable about khepri ? Nothing, if you ask me :) Feel free to link to that download location.
Idwer
M,
Idwer Vollering wrote:
2010/7/21 Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.netmailto: c-d.hailfinger.devel.2006@gmx.net>
Speed up RayeR SPIPGM driver in flashrom by a factor of 2.
Allow specification of an alternate base port with flashrom -p rayer_spi:lptport=0x278 Any port number is allowed as long as it is nonzero, below 65536 and a multiple of four.
Untested, should work.
Martin, this one should hopefully reach the speed of SPIPGM.exe for reads. I'll ask Idwer to provide a DOS binary for you.
http://khepri.coresystems.de/~idwer/flashrom/r1093-patchwork-1666/http://khepri.coresystems.de/%7Eidwer/flashrom/r1093-patchwork-1666/< http://khepri.coresystems.de/%7Eidwer/flashrom/r1093-patchwork-1666/%3E
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net mailto:c-d.hailfinger.devel.2006@gmx.net>
Index: flashrom-bitbang_spi_rayer_faster/flashrom.8
--- flashrom-bitbang_spi_rayer_faster/flashrom.8 (Revision 1093) +++ flashrom-bitbang_spi_rayer_faster/flashrom.8 (Arbeitskopie) @@ -394,7 +394,18 @@ (in Hz). The default is the maximum frequency of 8 MHz. .TP .BR "rayer_spi " programmer -No parameters defined yet. More information about the hardware is available at +The default I/O base address used for the parallel port is 0x378 and you can use +the optional +.B lptport +parameter to specify an alternate base I/O address with the +.sp +.B " flashrom -p rayer_spi:lptport=portnum" +.sp +syntax where +.B portnum +is the I/O port number of your parallel port which must be a multiple of 4. +.sp +More information about the hardware is available at http://rayer.ic.cz/elektro/spipgm.htm .SH EXIT STATUS flashrom exits with 0 on success, 1 on most failures but with 2 if /dev/mem Index: flashrom-bitbang_spi_rayer_faster/rayer_spi.c =================================================================== --- flashrom-bitbang_spi_rayer_faster/rayer_spi.c (Revision 1093) +++ flashrom-bitbang_spi_rayer_faster/rayer_spi.c (Arbeitskopie) @@ -30,6 +30,7 @@ */ #if defined(__i386__) || defined(__x86_64__)
+#include <stdlib.h> #include "flash.h"
/* We have two sets of pins, out and in. The numbers for bothsets are @@ -42,7 +43,7 @@ /* Pins for slave->master direction */ #define SPI_MISO_PIN 6
-static int lpt_iobase; +static uint16_t lpt_iobase;
/* FIXME: All rayer_bitbang_set_* functions could use caching ofthe value * stored at port lpt_iobase to avoid unnecessary INB. In theory, only one @@ -50,37 +51,31 @@ * value. */
-void rayer_bitbang_set_cs(int val) +/* Cached value of last byte sent. */ +static uint8_t lpt_outval;
+static void rayer_bitbang_set_cs(int val) {
uint8_t tmp;tmp = INB(lpt_iobase);tmp &= ~(1 << SPI_CS_PIN);tmp |= (val << SPI_CS_PIN);OUTB(tmp, lpt_iobase);
lpt_outval &= ~(1 << SPI_CS_PIN);lpt_outval |= (val << SPI_CS_PIN);OUTB(lpt_outval, lpt_iobase);}-void rayer_bitbang_set_sck(int val) +static void rayer_bitbang_set_sck(int val) {
uint8_t tmp;tmp = INB(lpt_iobase);tmp &= ~(1 << SPI_SCK_PIN);tmp |= (val << SPI_SCK_PIN);OUTB(tmp, lpt_iobase);
lpt_outval &= ~(1 << SPI_SCK_PIN);lpt_outval |= (val << SPI_SCK_PIN);OUTB(lpt_outval, lpt_iobase);}-void rayer_bitbang_set_mosi(int val) +static void rayer_bitbang_set_mosi(int val) {
uint8_t tmp;tmp = INB(lpt_iobase);tmp &= ~(1 << SPI_MOSI_PIN);tmp |= (val << SPI_MOSI_PIN);OUTB(tmp, lpt_iobase);
lpt_outval &= ~(1 << SPI_MOSI_PIN);lpt_outval |= (val << SPI_MOSI_PIN);OUTB(lpt_outval, lpt_iobase);}-int rayer_bitbang_get_miso(void) +static int rayer_bitbang_get_miso(void) { uint8_t tmp;
@@ -99,16 +94,49 @@
int rayer_spi_init(void) {
/* Pick a default value for now. */lpt_iobase = 0x378;
char *portpos = NULL;/* Non-default port requested? */portpos = extract_programmer_param("lptport");if (portpos) {char *endptr = NULL;unsigned long tmp;tmp = strtoul(portpos, &endptr, 0);/* Port 0, port >0x1000, unaligned ports andgarbage strings
* are rejected.*/if (!tmp || (tmp >= 0x10000) || (tmp & 0x3) ||(*endptr != '\0')) {/* Using ports below 0x100 is a really badidea, and
* should only be done if no port between0x100 and
* 0xfffc works due to routing issues.*/msg_perr("Error: lptport specified, but novalid "
"port specified.\nPort must be amultiple of "
"0x4 and lie between 0x100 and0xfffc.\n");
free(portpos);return 1;} else {lpt_iobase = (uint16_t)tmp;msg_pinfo("Non-default I/O base requested.This will "
"not change the hardwaresettings.\n");
}} else {/* Pick a default value for the I/O base. */lpt_iobase = 0x378;}free(portpos);msg_pdbg("Using port 0x%x as I/O base for parallel portaccess.\n", lpt_iobase);
get_io_perms();
/* 1 usec halfperiod delay for now. */if (bitbang_spi_init(&bitbang_spi_master_rayer, 1))
/* Get the initial value before writing to any line. */lpt_outval = INB(lpt_iobase);/* Zero halfperiod delay. */if (bitbang_spi_init(&bitbang_spi_master_rayer, 0)) return 1; buses_supported = CHIP_BUSTYPE_SPI;
flashrom mailing list flashrom@flashrom.org mailto:flashrom@flashrom.org
On 21.07.2010 17:11, Idwer Vollering wrote:
2010/7/21 rayer rayer@seznam.cz
Thanks, I'll try...
Great. Please note that the parameter changed from -p rayer_bitbang_spi to -p rayer_spi because the short form is faster to type, and users do not care at all about bitbanging.
Please could you place the dos binary to some stable loacation so i could link it from my web?
What exactly is unstable about khepri ? Nothing, if you ask me :) Feel free to link to that download location.
I think this is about the changing URL. http://khepri.coresystems.de/%7Eidwer/flashrom/r1093-patchwork-1666/ won't be around forever, but maybe we can make a stable link.
http://khepri.coresystems.de/%7Eidwer/flashrom/ could maybe get a "latest" directory which points to the current trunk compile.
Martin, another option would be to link to http://khepri.coresystems.de/%7Eidwer/flashrom/ and tell people to use the "latest" or the "0.9.3" link once we have those in place. Then people can decide if they want a release or the latest code. I plan to release 0.9.3 soon (next 4 weeks) anyway.
Regards, Carl-Daniel
On 21.07.2010 18:14, Carl-Daniel Hailfinger wrote:
On 21.07.2010 17:11, Idwer Vollering wrote:
2010/7/21 rayer rayer@seznam.cz
Thanks, I'll try...
Great. Please note that the parameter changed from -p rayer_bitbang_spi to -p rayer_spi because the short form is faster to type, and users do not care at all about bitbanging.
Please could you place the dos binary to some stable loacation so i could link it from my web?
What exactly is unstable about khepri ? Nothing, if you ask me :) Feel free to link to that download location.
I think this is about the changing URL. http://khepri.coresystems.de/%7Eidwer/flashrom/r1093-patchwork-1666/ won't be around forever, but maybe we can make a stable link.
http://khepri.coresystems.de/%7Eidwer/flashrom/ could maybe get a "latest" directory which points to the current trunk compile.
Martin, another option would be to link to http://khepri.coresystems.de/%7Eidwer/flashrom/ and tell people to use the "latest" or the "0.9.3" link once we have those in place. Then people can decide if they want a release or the latest code. I plan to release 0.9.3 soon (next 4 weeks) anyway.
%7Eidwer looks unreadable in a URL. You can replace it with ~idwer like this: http://khepri.coresystems.de/~idwer/flashrom/
Regards, Carl-Daniel
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Carl-Daniel Hailfinger -
Idwer Vollering -
Michael Karcher -
rayer