flashshrom -E flashrom v0.9.3-r1246 on Linux 2.6.34-12-default (i686), built with libpci 3.1.7, GCC 4.5.0 20100604 [gcc-4_5-branch revision 160292], little endian flashrom is free software, get the source code at http://www.flashrom.org
Calibrating delay loop... OK. No coreboot table found. Found ITE Super I/O, ID 0x8712. Found chipset "NVIDIA NForce2", enabling flash write... OK. This chipset supports the following protocols: Non-SPI. Found chip "PMC Pm49FL002" (256 KB, LPC,FWH) at physical address 0xfffc0000. === This flash part has status UNTESTED for operations: WRITE The test status of this chip may have been updated in the latest development version of flashrom. If you are running the latest development version, please email a report to flashrom@flashrom.org if any of the above operations work correctly for you with this flash part. Please include the flashrom output with the additional -V option for all operations you tested (-V, -Vr, -Vw, -VE), and mention which mainboard or programmer you tested. Please mention your board in the subject line. Thanks for your help! Erasing and writing flash chip... ERASE FAILED at 0x00000000! Expected=0xff, Read=0x22, failed byte count from 0x00000000-0x00000fff: 0xff2 ERASE FAILED! ERASE FAILED at 0x00000000! Expected=0xff, Read=0x22, failed byte count from 0x00000000-0x00003fff: 0x3fc2 ERASE FAILED! ERASE FAILED at 0x00000000! Expected=0xff, Read=0x22, failed byte count from 0x00000000-0x0003ffff: 0x3b432 ERASE FAILED! Done.
--------- motherboard GA-7n400
Hello,
Your board needs some special code to enable writing/erasing, a board enable. Please reply with the output (as root) of the following: lspci -vvvnnxxx
Thanks.
Josh
(dev note: nvidia_mcp_gpio0e_raise(); clear bit 0 in ioport 0x1003)