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Re: [flashrom] [PATCH] [rfc/demo] implementation of the Thinkpad T20/T21/T22 host
by Carl-Daniel Hailfinger 13 Feb '10

13 Feb '10

On 16.01.2010 13:54, Michael Karcher wrote: > This mainboard uses external pins for banking the ROM chip, which seems > to be impossible to do with the "internal" programmer, yet I had to clone > most of the init stuff from internal.c . Hints for a clean implementation > will be appreciated. > It would be possible to make a copy of the selected struct programmer array element before running programmer_init, and have the programmer-specific programmer_init change the function … [View More]pointers on the fly. In your case, we'd change all chip_{read,write}[bwln] and {un,}map_flash_region pointers inside a board enable function. With register_shutdown it should be possible to have your shutdown function run in the intended place. > --- > Makefile | 2 +- > flash.h | 11 ++++++ > flashrom.c | 19 ++++++++++ > t20.c | 108 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > 4 files changed, 139 insertions(+), 1 deletions(-) > create mode 100644 t20.c > > diff --git a/Makefile b/Makefile > index 501f65a..cdd45d1 100644 > --- a/Makefile > +++ b/Makefile > @@ -101,7 +101,7 @@ CONFIG_PRINT_WIKI ?= no > > ifeq ($(CONFIG_INTERNAL), yes) > FEATURE_CFLAGS += -D'INTERNAL_SUPPORT=1' > -PROGRAMMER_OBJS += chipset_enable.o board_enable.o cbtable.o it87spi.o ichspi.o sb600spi.o wbsio_spi.o > +PROGRAMMER_OBJS += chipset_enable.o board_enable.o cbtable.o it87spi.o ichspi.o sb600spi.o t20.o wbsio_spi.o > NEED_PCI := yes > endif > > diff --git a/flash.h b/flash.h > index 9a25c70..77b0d48 100644 > --- a/flash.h > +++ b/flash.h > @@ -58,6 +58,9 @@ enum programmer { > #if INTERNAL_SUPPORT == 1 > PROGRAMMER_IT87SPI, > #endif > +#if INTERNAL_SUPPORT == 1 > + PROGRAMMER_TPT20, > +#endif > #if FT2232_SPI_SUPPORT == 1 > PROGRAMMER_FT2232SPI, > #endif > @@ -435,6 +438,14 @@ uint8_t drkaiser_chip_readb(const chipaddr addr); > extern struct pcidev_status drkaiser_pcidev[]; > #endif > > +/* t20.c */ > +#if INTERNAL_SUPPORT == 1 > +int t20_init(void); > +int t20_shutdown(void); > +void t20_chip_writeb(uint8_t val, chipaddr addr); > +uint8_t t20_chip_readb(const chipaddr addr); > +#endif > + > /* satasii.c */ > #if SATASII_SUPPORT == 1 > int satasii_init(void); > diff --git a/flashrom.c b/flashrom.c > index db44c2f..7f05eeb 100644 > --- a/flashrom.c > +++ b/flashrom.c > @@ -226,6 +226,25 @@ const struct programmer_entry programmer_table[] = { > }, > #endif > > +#if INTERNAL_SUPPORT == 1 > + { > + .name = "t20", > + .init = t20_init, > + .shutdown = t20_shutdown, > + .map_flash_region = fallback_map, > + .unmap_flash_region = fallback_unmap, > + .chip_readb = t20_chip_readb, > + .chip_readw = fallback_chip_readw, > + .chip_readl = fallback_chip_readl, > + .chip_readn = fallback_chip_readn, > + .chip_writeb = t20_chip_writeb, > + .chip_writew = fallback_chip_writew, > + .chip_writel = fallback_chip_writel, > + .chip_writen = fallback_chip_writen, > + .delay = internal_delay, > + }, > +#endif > + > #if FT2232_SPI_SUPPORT == 1 > { > .name = "ft2232spi", > diff --git a/t20.c b/t20.c > new file mode 100644 > index 0000000..d6841cc > --- /dev/null > +++ b/t20.c > @@ -0,0 +1,108 @@ > +/* > + * This file is part of the flashrom project. > + * > + * Copyright (C) 2010 Michael Karcher <flashrom(a)mkarcher.dialup.fu-berlin.de> > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License as published by > + * the Free Software Foundation; either version 2 of the License, or > + * (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA > + */ > + > +/* Base address of register IND1 in the Field IMGA in the DSDT */ > +#define IMGA1_BASE 0x15EE > It would be great if we could get this info from a live system, and not have to rely on hardcoding it (may depend on BIOS version, installed hardware etc.). No idea if it is possible to ask ACPI about that value (at least without including a big ACPI parser in flashrom). > + > +#include "flash.h" > + > +static uint8_t *t20_base; > + > +#define MAX_COUNT 20 > + > +static void imga1_mask(uint8_t index, uint8_t mask, uint8_t value) > This function can fail. Should it return int instead of void? > +{ > + uint16_t temp; > + int count = 0; > + /* Be careful, as ACPI might use these registers too, so check > + that the index is still OK. */ > Comment style nitpick: Please start the second and following lines of a multiline comment with * and terminate such comments on a separate line. I don't see the "Be careful" motto mentioned above in the code below. If ACPI accesses IMGA1_BASE, we will pretty sure mess up ACPI accesses there. It's a race condition, and since we are not in control of ACPI, there is nothing we can do to reduce impact on the ACPI code. Besides that, there is a time window between the last INW and the final OUTW where anything can happen. > + do { > + OUTB(index, IMGA1_BASE); > + temp = INW(IMGA1_BASE); > OUTB, but INW. Is there a reason for the size mismatch? > + } > + while ((temp & 0xff) != index && ++count < MAX_COUNT); > Minor coding style nitpick: The while statement should be on the same line as the closing brace. > + if(count == MAX_COUNT) > + { > + printf("error: IMGA1 index stuck at %02x\n", temp & 0xff); > + return; > + } > + temp &= ~(mask << 8); > OK, maybe I've stared at such code too often, but given that mask is uint8_t and shifting happens inside brackets, isn't the compiler free to treat the calculation inside brackets as yielding an uint8_t as well, causing the contents of the bracket to be always zero, or to wrap around the bitshift at an 8-bit boundary, causing the contents of the bracket to be unshifted? I would have expected a cast of mask to uint16_t. > + temp |= (value & mask) << 8; > + OUTW(temp, IMGA1_BASE); > To be honest, the code flow in this function seems obvious at first, and on a second look it becomes an example of clever (maybe even too clever) coding. A few comments about the behaviour of IMGA1_BASE would be very appreciated. So far it seems that IMGA1_BASE is used to refer to two registers, namely an index/value pair. The OUTW is a trick to get an atomic write of index+value (is that guaranteed to be atomic by the x86 ISA?), a similar explanation probably applies to the INW. > +} > + > +int t20_init(void) > +{ > + pacc = pci_alloc(); > + pci_init(pacc); > + pci_scan_bus(pacc); /* We want to get the list of devices */ > + get_io_perms(); > I'm not 100% sure if the ordering above is correct. On some fringe platform, we might have to get IO permission before scanning the PCI bus. This is only a minor nitpick, not a hard requirement. > + /* ID of the graphics chip in T20/T21/T22. The mainboards are > + identical in these models */ > + if (!pci_card_find(0x5333, 0x8c12, 0x1014, 0x017f)) > + { > + msg_perr("This is not a ThinkPad T20/T21/T22\n"); > + return 1; > + } > IMHO the matching is too loose here. I'd like to see an additional DMI match and/or a second PCI device match. > + if (chipset_flash_enable() == -2) { > + printf("WARNING: No chipset found. Flash detection " > + "will most likely fail.\n"); > + } > What if the chipset enable returns -1? > + > + imga1_mask(0, 4, 4); /* Enable flash writes */ > + t20_base = physmap("IBM T20 mainboard flash", 0xFFFE0000, 0x20000); > A comment about the address used for physmap would be very nice, even if it is just "The EC maps a window of the flash chip to 4G-0x20000". > + buses_supported = CHIP_BUSTYPE_PARALLEL; > + return 0; > +} > + > +int t20_shutdown(void) > +{ > + physunmap(t20_base, 0x20000); > + imga1_mask(0, 4, 4); /* Disable flash writes */ > + release_io_perms(); > + pci_cleanup(pacc); > + return 0; > +} > + > +static unsigned int currentbank = -1U; > You could move currentbank inside switchtobank. Not sure if that is a good idea, though. > + > +static void switchtobank(unsigned int banknum) > +{ > + if (banknum > 3) > + { > + msg_perr("Bad bank number %d\n", banknum); > + return; > + } > + if(banknum != currentbank) > + imga1_mask(0, 3, banknum); > + currentbank = banknum; > +} > + > +void t20_chip_writeb(uint8_t val, chipaddr addr) > +{ > + switchtobank(addr >> 17); > + mmio_writeb(val, t20_base + (addr & 0x1FFFF)); > +} > + > +uint8_t t20_chip_readb(chipaddr addr) > +{ > + switchtobank(addr >> 17); > + return mmio_readb(t20_base + (addr & 0x1FFFF)); > +} > Overall, I like the patch and will probably ack it next time. Regards, Carl-Daniel -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers." [View Less]

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[patch] NetBSD/amd64 build fix
by Jonathan A. Kollasch 13 Feb '10

13 Feb '10

Use uname -p instead of -m on NetBSD so we get the right architecture library name. Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net> ---

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[PATCH] Avoid SPI RES if REMS is available
by Carl-Daniel Hailfinger 12 Feb '10

12 Feb '10

SPI RES is the most unreliable way to identify chips because it only returns a 1-byte ID for most chips. For every given ID out there, probably a dozen incompatible flash chips match it. We already refuse to identify a chip with RES if that chip responds to RDID (3 bytes, good match), and with this patch we additionally refuse RES if the chip responds to REMS (2 bytes, still a good match). This increases matching accuracy a lot. Besides that, the RDID/REMS response checking has been cleaned up … [View More]

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[commit] r899 - trunk
by repository service 12 Feb '10

12 Feb '10

Author: hailfinger Date: Fri Feb 12 20:37:25 2010 New Revision: 899 URL: http://flashrom.org/trac/coreboot/changeset/899 Log: SPI RES is the most unreliable way to identify chips because it only returns a 1-byte ID for most chips. For every given ID out there, probably a dozen incompatible flash chips match it. We already refuse to identify a chip with RES if that chip responds to RDID (3 bytes, good match), and with this patch we additionally refuse RES if the chip responds to REMS (2 bytes, … [View More]

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[PATCH] Split hardware access from internal programmer
by Carl-Daniel Hailfinger 12 Feb '10

12 Feb '10

Linking in support for the internal programmer doesn't make sense if you only need hardware (ioport, memory) access. Split internal.c into internal.c and hwaccess.c. Note: This patch was created by "svn cp internal.c hwaccess.c" and then removing stuff from both files. That's why you can't apply the patch as-is before running the svn cp. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-internal_pci_split/hwaccess.c =============================… [View More]====================================== --- flashrom-internal_pci_split/hwaccess.c (Revision 896) +++ flashrom-internal_pci_split/hwaccess.c (Arbeitskopie) @@ -1,7 +1,7 @@ /* * This file is part of the flashrom project. * - * Copyright (C) 2009 Carl-Daniel Hailfinger + * Copyright (C) 2009,2010 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -23,7 +23,6 @@ #include <stdlib.h> #include <fcntl.h> #include <sys/types.h> -#include <sys/stat.h> #include <errno.h> #include "flash.h" @@ -31,77 +30,6 @@ int io_fd; #endif -#if NEED_PCI == 1 -struct pci_dev *pci_dev_find_filter(struct pci_filter filter) -{ - struct pci_dev *temp; - - for (temp = pacc->devices; temp; temp = temp->next) - if (pci_filter_match(&filter, temp)) - return temp; - - return NULL; -} - -struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class) -{ - struct pci_dev *temp; - struct pci_filter filter; - uint16_t tmp2; - - pci_filter_init(NULL, &filter); - filter.vendor = vendor; - - for (temp = pacc->devices; temp; temp = temp->next) - if (pci_filter_match(&filter, temp)) { - /* Read PCI class */ - tmp2 = pci_read_word(temp, 0x0a); - if (tmp2 == class) - return temp; - } - - return NULL; -} - -struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device) -{ - struct pci_dev *temp; - struct pci_filter filter; - - pci_filter_init(NULL, &filter); - filter.vendor = vendor; - filter.device = device; - - for (temp = pacc->devices; temp; temp = temp->next) - if (pci_filter_match(&filter, temp)) - return temp; - - return NULL; -} - -struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device, - uint16_t card_vendor, uint16_t card_device) -{ - struct pci_dev *temp; - struct pci_filter filter; - - pci_filter_init(NULL, &filter); - filter.vendor = vendor; - filter.device = device; - - for (temp = pacc->devices; temp; temp = temp->next) - if (pci_filter_match(&filter, temp)) { - if ((card_vendor == - pci_read_word(temp, PCI_SUBSYSTEM_VENDOR_ID)) - && (card_device == - pci_read_word(temp, PCI_SUBSYSTEM_ID))) - return temp; - } - - return NULL; -} -#endif - void get_io_perms(void) { #if defined (__sun) && (defined(__i386) || defined(__amd64)) @@ -124,101 +52,6 @@ #endif } -#if INTERNAL_SUPPORT == 1 -struct superio superio = {}; - -void probe_superio(void) -{ - superio = probe_superio_ite(); -#if 0 /* Winbond SuperI/O code is not yet available. */ - if (superio.vendor == SUPERIO_VENDOR_NONE) - superio = probe_superio_winbond(); -#endif -} - -int internal_init(void) -{ - int ret = 0; - - get_io_perms(); - - /* Initialize PCI access for flash enables */ - pacc = pci_alloc(); /* Get the pci_access structure */ - /* Set all options you want -- here we stick with the defaults */ - pci_init(pacc); /* Initialize the PCI library */ - pci_scan_bus(pacc); /* We want to get the list of devices */ - - /* We look at the lbtable first to see if we need a - * mainboard specific flash enable sequence. - */ - coreboot_init(); - dmi_init(); - - /* Probe for the SuperI/O chip and fill global struct superio. */ - probe_superio(); - - /* try to enable it. Failure IS an option, since not all motherboards - * really need this to be done, etc., etc. - */ - ret = chipset_flash_enable(); - if (ret == -2) { - printf("WARNING: No chipset found. Flash detection " - "will most likely fail.\n"); - } - - board_flash_enable(lb_vendor, lb_part); - - /* Even if chipset init returns an error code, we don't want to abort. - * The error code might have been a warning only. - * Besides that, we don't check the board enable return code either. - */ - return 0; -} - -int internal_shutdown(void) -{ - release_io_perms(); - - return 0; -} -#endif - -void internal_chip_writeb(uint8_t val, chipaddr addr) -{ - mmio_writeb(val, (void *) addr); -} - -void internal_chip_writew(uint16_t val, chipaddr addr) -{ - mmio_writew(val, (void *) addr); -} - -void internal_chip_writel(uint32_t val, chipaddr addr) -{ - mmio_writel(val, (void *) addr); -} - -uint8_t internal_chip_readb(const chipaddr addr) -{ - return mmio_readb((void *) addr); -} - -uint16_t internal_chip_readw(const chipaddr addr) -{ - return mmio_readw((void *) addr); -} - -uint32_t internal_chip_readl(const chipaddr addr) -{ - return mmio_readl((void *) addr); -} - -void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len) -{ - memcpy(buf, (void *)addr, len); - return; -} - void mmio_writeb(uint8_t val, void *addr) { *(volatile uint8_t *) addr = val; Index: flashrom-internal_pci_split/hwaccess.h =================================================================== --- flashrom-internal_pci_split/hwaccess.h (Revision 896) +++ flashrom-internal_pci_split/hwaccess.h (Arbeitskopie) @@ -133,10 +133,6 @@ #endif #endif -#if defined(__FreeBSD__) || defined(__DragonFly__) -extern int io_fd; -#endif - #if !defined(__DARWIN__) && !defined(__FreeBSD__) && !defined(__DragonFly__) typedef struct { uint32_t hi, lo; } msr_t; msr_t rdmsr(int addr); Index: flashrom-internal_pci_split/Makefile =================================================================== --- flashrom-internal_pci_split/Makefile (Revision 896) +++ flashrom-internal_pci_split/Makefile (Arbeitskopie) @@ -103,7 +103,7 @@ ifeq ($(CONFIG_INTERNAL), yes) FEATURE_CFLAGS += -D'INTERNAL_SUPPORT=1' -PROGRAMMER_OBJS += chipset_enable.o board_enable.o cbtable.o dmi.o it87spi.o ichspi.o sb600spi.o wbsio_spi.o +PROGRAMMER_OBJS += chipset_enable.o board_enable.o cbtable.o dmi.o it87spi.o ichspi.o sb600spi.o wbsio_spi.o internal.o NEED_PCI := yes endif @@ -180,12 +180,7 @@ ifeq ($(NEED_PCI), yes) LIBS += -lpci FEATURE_CFLAGS += -D'NEED_PCI=1' -PROGRAMMER_OBJS += pcidev.o physmap.o internal.o #FIXME: We need to move stuff - # from internal.c and pcidev.c to pci.c - # internal.c needs to be split - # into internal-programmer-only stuff - # and a support lib for all internal+pci - # based stuff. +PROGRAMMER_OBJS += pcidev.o physmap.o hwaccess.o ifeq ($(OS_ARCH), NetBSD) LIBS += -lpciutils # The libpci we want. LIBS += -l$(shell uname -m) # For (i386|x86_64)_iopl(2). Index: flashrom-internal_pci_split/internal.c =================================================================== --- flashrom-internal_pci_split/internal.c (Revision 896) +++ flashrom-internal_pci_split/internal.c (Arbeitskopie) @@ -27,10 +27,6 @@ #include <errno.h> #include "flash.h" -#if defined(__FreeBSD__) || defined(__DragonFly__) -int io_fd; -#endif - #if NEED_PCI == 1 struct pci_dev *pci_dev_find_filter(struct pci_filter filter) { @@ -102,28 +98,6 @@ } #endif -void get_io_perms(void) -{ -#if defined (__sun) && (defined(__i386) || defined(__amd64)) - if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) { -#elif defined(__FreeBSD__) || defined (__DragonFly__) - if ((io_fd = open("/dev/io", O_RDWR)) < 0) { -#else - if (iopl(3) != 0) { -#endif - fprintf(stderr, "ERROR: Could not get I/O privileges (%s).\n" - "You need to be root.\n", strerror(errno)); - exit(1); - } -} - -void release_io_perms(void) -{ -#if defined(__FreeBSD__) || defined(__DragonFly__) - close(io_fd); -#endif -} - #if INTERNAL_SUPPORT == 1 struct superio superio = {}; @@ -218,33 +192,3 @@ memcpy(buf, (void *)addr, len); return; } - -void mmio_writeb(uint8_t val, void *addr) -{ - *(volatile uint8_t *) addr = val; -} - -void mmio_writew(uint16_t val, void *addr) -{ - *(volatile uint16_t *) addr = val; -} - -void mmio_writel(uint32_t val, void *addr) -{ - *(volatile uint32_t *) addr = val; -} - -uint8_t mmio_readb(void *addr) -{ - return *(volatile uint8_t *) addr; -} - -uint16_t mmio_readw(void *addr) -{ - return *(volatile uint16_t *) addr; -} - -uint32_t mmio_readl(void *addr) -{ - return *(volatile uint32_t *) addr; -} -- Developer quote of the year: "We are juggling too many chainsaws and flaming arrows and tigers." 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[commit] r898 - trunk
by repository service 12 Feb '10

12 Feb '10

Author: hailfinger Date: Fri Feb 12 20:35:25 2010 New Revision: 898 URL: http://flashrom.org/trac/coreboot/changeset/898 Log: Linking in support for the internal programmer doesn't make sense if you only need hardware (ioport, memory) access. Split internal.c into internal.c and hwaccess.c. Note: This patch was created by "svn cp internal.c hwaccess.c" and then removing stuff from both files. That's why you can't apply the patch as-is before running the svn cp. Signed-off-by: Carl-Daniel … [View More]Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Sean Nelson <audiohacked(a)gmail.com> Added: trunk/hwaccess.c - copied, changed from r896, trunk/internal.c Modified: trunk/Makefile trunk/hwaccess.h trunk/internal.c Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Fri Feb 12 19:40:27 2010 (r897) +++ trunk/Makefile Fri Feb 12 20:35:25 2010 (r898) @@ -103,7 +103,7 @@ ifeq ($(CONFIG_INTERNAL), yes) FEATURE_CFLAGS += -D'INTERNAL_SUPPORT=1' -PROGRAMMER_OBJS += chipset_enable.o board_enable.o cbtable.o dmi.o it87spi.o ichspi.o sb600spi.o wbsio_spi.o +PROGRAMMER_OBJS += chipset_enable.o board_enable.o cbtable.o dmi.o it87spi.o ichspi.o sb600spi.o wbsio_spi.o internal.o NEED_PCI := yes endif @@ -180,12 +180,7 @@ ifeq ($(NEED_PCI), yes) LIBS += -lpci FEATURE_CFLAGS += -D'NEED_PCI=1' -PROGRAMMER_OBJS += pcidev.o physmap.o internal.o #FIXME: We need to move stuff - # from internal.c and pcidev.c to pci.c - # internal.c needs to be split - # into internal-programmer-only stuff - # and a support lib for all internal+pci - # based stuff. +PROGRAMMER_OBJS += pcidev.o physmap.o hwaccess.o ifeq ($(OS_ARCH), NetBSD) LIBS += -lpciutils # The libpci we want. LIBS += -l$(shell uname -m) # For (i386|x86_64)_iopl(2). Copied and modified: trunk/hwaccess.c (from r896, trunk/internal.c) ============================================================================== --- trunk/internal.c Fri Feb 12 06:44:18 2010 (r896, copy source) +++ trunk/hwaccess.c Fri Feb 12 20:35:25 2010 (r898) @@ -1,7 +1,7 @@ /* * This file is part of the flashrom project. * - * Copyright (C) 2009 Carl-Daniel Hailfinger + * Copyright (C) 2009,2010 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -23,7 +23,6 @@ #include <stdlib.h> #include <fcntl.h> #include <sys/types.h> -#include <sys/stat.h> #include <errno.h> #include "flash.h" @@ -31,77 +30,6 @@ int io_fd; #endif -#if NEED_PCI == 1 -struct pci_dev *pci_dev_find_filter(struct pci_filter filter) -{ - struct pci_dev *temp; - - for (temp = pacc->devices; temp; temp = temp->next) - if (pci_filter_match(&filter, temp)) - return temp; - - return NULL; -} - -struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class) -{ - struct pci_dev *temp; - struct pci_filter filter; - uint16_t tmp2; - - pci_filter_init(NULL, &filter); - filter.vendor = vendor; - - for (temp = pacc->devices; temp; temp = temp->next) - if (pci_filter_match(&filter, temp)) { - /* Read PCI class */ - tmp2 = pci_read_word(temp, 0x0a); - if (tmp2 == class) - return temp; - } - - return NULL; -} - -struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device) -{ - struct pci_dev *temp; - struct pci_filter filter; - - pci_filter_init(NULL, &filter); - filter.vendor = vendor; - filter.device = device; - - for (temp = pacc->devices; temp; temp = temp->next) - if (pci_filter_match(&filter, temp)) - return temp; - - return NULL; -} - -struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device, - uint16_t card_vendor, uint16_t card_device) -{ - struct pci_dev *temp; - struct pci_filter filter; - - pci_filter_init(NULL, &filter); - filter.vendor = vendor; - filter.device = device; - - for (temp = pacc->devices; temp; temp = temp->next) - if (pci_filter_match(&filter, temp)) { - if ((card_vendor == - pci_read_word(temp, PCI_SUBSYSTEM_VENDOR_ID)) - && (card_device == - pci_read_word(temp, PCI_SUBSYSTEM_ID))) - return temp; - } - - return NULL; -} -#endif - void get_io_perms(void) { #if defined (__sun) && (defined(__i386) || defined(__amd64)) @@ -124,101 +52,6 @@ #endif } -#if INTERNAL_SUPPORT == 1 -struct superio superio = {}; - -void probe_superio(void) -{ - superio = probe_superio_ite(); -#if 0 /* Winbond SuperI/O code is not yet available. */ - if (superio.vendor == SUPERIO_VENDOR_NONE) - superio = probe_superio_winbond(); -#endif -} - -int internal_init(void) -{ - int ret = 0; - - get_io_perms(); - - /* Initialize PCI access for flash enables */ - pacc = pci_alloc(); /* Get the pci_access structure */ - /* Set all options you want -- here we stick with the defaults */ - pci_init(pacc); /* Initialize the PCI library */ - pci_scan_bus(pacc); /* We want to get the list of devices */ - - /* We look at the lbtable first to see if we need a - * mainboard specific flash enable sequence. - */ - coreboot_init(); - dmi_init(); - - /* Probe for the SuperI/O chip and fill global struct superio. */ - probe_superio(); - - /* try to enable it. Failure IS an option, since not all motherboards - * really need this to be done, etc., etc. - */ - ret = chipset_flash_enable(); - if (ret == -2) { - printf("WARNING: No chipset found. Flash detection " - "will most likely fail.\n"); - } - - board_flash_enable(lb_vendor, lb_part); - - /* Even if chipset init returns an error code, we don't want to abort. - * The error code might have been a warning only. - * Besides that, we don't check the board enable return code either. - */ - return 0; -} - -int internal_shutdown(void) -{ - release_io_perms(); - - return 0; -} -#endif - -void internal_chip_writeb(uint8_t val, chipaddr addr) -{ - mmio_writeb(val, (void *) addr); -} - -void internal_chip_writew(uint16_t val, chipaddr addr) -{ - mmio_writew(val, (void *) addr); -} - -void internal_chip_writel(uint32_t val, chipaddr addr) -{ - mmio_writel(val, (void *) addr); -} - -uint8_t internal_chip_readb(const chipaddr addr) -{ - return mmio_readb((void *) addr); -} - -uint16_t internal_chip_readw(const chipaddr addr) -{ - return mmio_readw((void *) addr); -} - -uint32_t internal_chip_readl(const chipaddr addr) -{ - return mmio_readl((void *) addr); -} - -void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len) -{ - memcpy(buf, (void *)addr, len); - return; -} - void mmio_writeb(uint8_t val, void *addr) { *(volatile uint8_t *) addr = val; Modified: trunk/hwaccess.h ============================================================================== --- trunk/hwaccess.h Fri Feb 12 19:40:27 2010 (r897) +++ trunk/hwaccess.h Fri Feb 12 20:35:25 2010 (r898) @@ -133,10 +133,6 @@ #endif #endif -#if defined(__FreeBSD__) || defined(__DragonFly__) -extern int io_fd; -#endif - #if !defined(__DARWIN__) && !defined(__FreeBSD__) && !defined(__DragonFly__) typedef struct { uint32_t hi, lo; } msr_t; msr_t rdmsr(int addr); Modified: trunk/internal.c ============================================================================== --- trunk/internal.c Fri Feb 12 19:40:27 2010 (r897) +++ trunk/internal.c Fri Feb 12 20:35:25 2010 (r898) @@ -27,10 +27,6 @@ #include <errno.h> #include "flash.h" -#if defined(__FreeBSD__) || defined(__DragonFly__) -int io_fd; -#endif - #if NEED_PCI == 1 struct pci_dev *pci_dev_find_filter(struct pci_filter filter) { @@ -102,28 +98,6 @@ } #endif -void get_io_perms(void) -{ -#if defined (__sun) && (defined(__i386) || defined(__amd64)) - if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) { -#elif defined(__FreeBSD__) || defined (__DragonFly__) - if ((io_fd = open("/dev/io", O_RDWR)) < 0) { -#else - if (iopl(3) != 0) { -#endif - fprintf(stderr, "ERROR: Could not get I/O privileges (%s).\n" - "You need to be root.\n", strerror(errno)); - exit(1); - } -} - -void release_io_perms(void) -{ -#if defined(__FreeBSD__) || defined(__DragonFly__) - close(io_fd); -#endif -} - #if INTERNAL_SUPPORT == 1 struct superio superio = {}; @@ -218,33 +192,3 @@ memcpy(buf, (void *)addr, len); return; } - -void mmio_writeb(uint8_t val, void *addr) -{ - *(volatile uint8_t *) addr = val; -} - -void mmio_writew(uint16_t val, void *addr) -{ - *(volatile uint16_t *) addr = val; -} - -void mmio_writel(uint32_t val, void *addr) -{ - *(volatile uint32_t *) addr = val; -} - -uint8_t mmio_readb(void *addr) -{ - return *(volatile uint8_t *) addr; -} - -uint16_t mmio_readw(void *addr) -{ - return *(volatile uint16_t *) addr; -} - -uint32_t mmio_readl(void *addr) -{ - return *(volatile uint32_t *) addr; -} [View Less]

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[PATCH] Fix Winbond W25X{10, 20, 40, 80} incorrect erase blocks
by Sean Nelson 12 Feb '10

12 Feb '10

Fix erase blocks for Winbond W25X* SPI chips. The Winbond W25X10 and related chips only have 4k and 64k blocks and only accept erase commands: 20h, d8h, and c7h. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com>

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[commit] r897 - trunk
by repository service 12 Feb '10

12 Feb '10

Author: snelson Date: Fri Feb 12 19:40:27 2010 New Revision: 897 URL: http://flashrom.org/trac/coreboot/changeset/897 Log: Fix erase blocks for Winbond W25X{10,20,40,80} SPI chips. The Winbond W25X10 and related chips only have 4k and 64k blocks and only accept erase commands: 20h, d8h, and c7h. Signed-off-by: Sean Nelson <audiohacked(a)gmail.com> Acked-by: David Hendricks <dhendrix(a)google.com> Modified: trunk/flashchips.c Modified: trunk/flashchips.c =======================… [View More]======================================================= --- trunk/flashchips.c Fri Feb 12 06:44:18 2010 (r896) +++ trunk/flashchips.c Fri Feb 12 19:40:27 2010 (r897) @@ -5365,16 +5365,10 @@ .eraseblocks = { {4 * 1024, 32} }, .block_erase = spi_block_erase_20, }, { - .eraseblocks = { {32 * 1024, 4} }, - .block_erase = spi_block_erase_52, - }, { .eraseblocks = { {64 * 1024, 2} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {128 * 1024, 1} }, - .block_erase = spi_block_erase_60, - }, { - .eraseblocks = { {128 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, @@ -5399,16 +5393,10 @@ .eraseblocks = { {4 * 1024, 64} }, .block_erase = spi_block_erase_20, }, { - .eraseblocks = { {32 * 1024, 8} }, - .block_erase = spi_block_erase_52, - }, { .eraseblocks = { {64 * 1024, 4} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {256 * 1024, 1} }, - .block_erase = spi_block_erase_60, - }, { - .eraseblocks = { {256 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, @@ -5433,16 +5421,10 @@ .eraseblocks = { {4 * 1024, 128} }, .block_erase = spi_block_erase_20, }, { - .eraseblocks = { {32 * 1024, 16} }, - .block_erase = spi_block_erase_52, - }, { .eraseblocks = { {64 * 1024, 8} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {512 * 1024, 1} }, - .block_erase = spi_block_erase_60, - }, { - .eraseblocks = { {512 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, @@ -5467,16 +5449,10 @@ .eraseblocks = { {4 * 1024, 256} }, .block_erase = spi_block_erase_20, }, { - .eraseblocks = { {32 * 1024, 32} }, - .block_erase = spi_block_erase_52, - }, { .eraseblocks = { {64 * 1024, 16} }, .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {1024 * 1024, 1} }, - .block_erase = spi_block_erase_60, - }, { - .eraseblocks = { {1024 * 1024, 1} }, .block_erase = spi_block_erase_c7, } }, [View Less]

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A8JM board_enable patch (was Re: A8JM flashrom unable to erase)
by James Lancaster 12 Feb '10

12 Feb '10

Adds support to board_enable.c for ASUS A8JM Notebooks (and possibly all A8J series) Signed-off-by: James Lancaster <deathstalker(a)gmail.com> --- I have now gotten it working. I would like to thank some of the people in IRC for trying to help. It came down to me seeing a few similar 945 + ICH7 and just trying (first randomly, then systematically) all the possible GPIO pins. Finding that one needs to raise GPIO pin 34 on the ich7. The rest was already supported. Of note: It does not … [View More]

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HP Vectra VL420 SFF
by Mattias Mattsson 12 Feb '10

12 Feb '10

Hi, I'm trying to flash the latest BIOS-version on a HP Vectra VL420 SFF but it fails with latest flashrom (r811). This computer has a motherboard similiar to an ASUS P4B-MX, the HP board is even labeled "P4B-MX" on the board itself. Some differences though: The HP board uses an AMI BIOS while the ASUS seems to have an Award BIOS. Latest VL420-BIOS (version "JA.01.07US"): ftp://ftp.hp.com/pub/softpaq/sp30001-30500/sp30221.exe Info attached. Thanks! -mattias

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