flashrom

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[PATCH] SPI flash chip emulator
by Carl-Daniel Hailfinger 02 Nov '10

02 Nov '10

Add SPI flash emulation capability to dummyflasher. You have to choose at compile time between - no emulation - ST M25P10.RES SPI flash chip (RES, page write) - SST SST25VF040.REMS SPI flash chip (REMS, byte write) - SST SST25VF032B SPI flash chip (RDID, AAI write) This code helped me find and fix various bugs in the SPI write code (patches forthcoming). Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-emulate_spi_flashchip/dummyflasher.c =================================================================== --- flashrom-emulate_spi_flashchip/dummyflasher.c (Revision 1216) +++ flashrom-emulate_spi_flashchip/dummyflasher.c (Arbeitskopie) @@ -25,6 +25,45 @@ #include "chipdrivers.h" #include "programmer.h" +//#define EMULATE_ST_M25P10_RES 1 +//#define EMULATE_SST_SST25VF040_REMS 1 +//#define EMULATE_SST_SST25VF032B 1 + +#if EMULATE_ST_M25P10_RES + EMULATE_SST_SST25VF040_REMS + EMULATE_SST_SST25VF032B > 1 +#error Only one chip can be emulated. Please decide which one you want. +#endif + +#if EMULATE_ST_M25P10_RES || EMULATE_SST_SST25VF040_REMS || EMULATE_SST_SST25VF032B +#define EMULATE_SPI_CHIP 1 +#endif + +#if EMULATE_SPI_CHIP +#define EMULATE_CHIP 1 +#include "spi.h" +#endif + +#if EMULATE_ST_M25P10_RES +#define EMU_FLASHCHIP_SIZE 128 * 1024 +#define MAX_BYTEPROGRAM_SIZE 128 +#define MAX_AAI_SIZE 0 +#endif + +#if EMULATE_SST_SST25VF040_REMS +#define EMU_FLASHCHIP_SIZE 512 * 1024 +#define MAX_BYTEPROGRAM_SIZE 1 +#define MAX_AAI_SIZE 0 +#endif + +#if EMULATE_SST_SST25VF032B +#define EMU_FLASHCHIP_SIZE 4 * 1024 * 1024 +#define MAX_BYTEPROGRAM_SIZE 1 +#define MAX_AAI_SIZE 2 +#endif + +#if EMULATE_CHIP +static uint8_t flashchip_contents[EMU_FLASHCHIP_SIZE]; +#endif + static void tolower_string(char *str) { for (; *str != '\0'; str++) @@ -65,6 +104,25 @@ if (buses_supported == CHIP_BUSTYPE_NONE) msg_pdbg("Support for all flash bus types disabled.\n"); free(bustext); + +#if EMULATE_ST_M25P10_RES + msg_pdbg("Emulating ST M25P10.RES SPI flash chip (RES, page write)\n"); +#endif +#if EMULATE_SST_SST25VF040_REMS + msg_pdbg("Emulating SST SST25VF040.REMS SPI flash chip (REMS, byte " + "write)\n"); +#endif +#if EMULATE_SST_SST25VF032B + msg_pdbg("Emulating SST SST25VF032B SPI flash chip (RDID, AAI " + "write)\n"); +#endif +#if EMULATE_CHIP + msg_pdbg("Filling fake flash chip with 0xff, size %i\n", + sizeof(flashchip_contents)); + memset(flashchip_contents, 0xff, sizeof(flashchip_contents)); +#else + msg_pdbg("Not emulating any flash chip.\n"); +#endif return 0; } @@ -140,6 +198,123 @@ return; } +#if EMULATE_SPI_CHIP +static int emulate_spi_chip_response(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr) +{ + int offs; +#if EMULATE_SST_SST25VF032B + static int aai_offs; + static int aai_active = 0; +#endif + if (writecnt == 0) { + msg_cerr("No command sent to the chip!\n"); + return 1; + } + switch (writearr[0]) { +#if EMULATE_ST_M25P10_RES + case JEDEC_RES: + /* Respond with ST_M25P10_RES. */ + if (readcnt > 0) + readarr[0] = 0x10; + break; +#endif +#if EMULATE_SST_SST25VF040_REMS + case JEDEC_REMS: + /* Respond with SST_SST25VF040_REMS. */ + if (readcnt > 0) + readarr[0] = 0xbf; + if (readcnt > 1) + readarr[1] = 0x44; + break; +#endif +#if EMULATE_SST_SST25VF032B + case JEDEC_RDID: + /* Respond with SST_SST25VF032B. */ + if (readcnt > 0) + readarr[0] = 0xbf; + if (readcnt > 1) + readarr[1] = 0x25; + if (readcnt > 2) + readarr[2] = 0x4a; + break; +#endif + case JEDEC_RDSR: + memset(readarr, 0, readcnt); +#if EMULATE_SST_SST25VF032B + if (aai_active) + memset(readarr, 1 << 6, readcnt); +#endif + break; + case JEDEC_READ: + offs = writearr[1] << 16 | writearr[2] << 8 | + writearr[3]; + /* Truncate to EMU_FLASHCHIP_SIZE. */ + offs %= EMU_FLASHCHIP_SIZE; + if (readcnt > 0) + memcpy(readarr, flashchip_contents + offs, readcnt); + break; + case JEDEC_BYTE_PROGRAM: + offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; + /* Truncate to EMU_FLASHCHIP_SIZE. */ + offs %= EMU_FLASHCHIP_SIZE; + if (writecnt < 5) { + msg_cerr("BYTE PROGRAM size too short!\n"); + return 1; + } + if (writecnt - 4 > MAX_BYTEPROGRAM_SIZE) { + msg_cerr("Max BYTE PROGRAM size exceeded!\n"); + return 1; + } + memcpy(flashchip_contents + offs, writearr + 4, writecnt - 4); + break; +#if EMULATE_SST_SST25VF032B + case JEDEC_AAI_WORD_PROGRAM: + if (!aai_active) { + if (writecnt < JEDEC_AAI_WORD_PROGRAM_OUTSIZE) { + msg_cerr("Initial AAI WORD PROGRAM size too " + "short!\n"); + return 1; + } + if (writecnt > JEDEC_AAI_WORD_PROGRAM_OUTSIZE) { + msg_cerr("Initial AAI WORD PROGRAM size too " + "long!\n"); + return 1; + } + aai_active = 1; + aai_offs = writearr[1] << 16 | writearr[2] << 8 | + writearr[3]; + /* Truncate to EMU_FLASHCHIP_SIZE. */ + aai_offs %= EMU_FLASHCHIP_SIZE; + memcpy(flashchip_contents + aai_offs, writearr + 4, 2); + aai_offs += 2; + } else { + if (writecnt < JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE) { + msg_cerr("Continuation AAI WORD PROGRAM size " + "too short!\n"); + return 1; + } + if (writecnt > JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE) { + msg_cerr("Continuation AAI WORD PROGRAM size " + "too long!\n"); + return 1; + } + memcpy(flashchip_contents + aai_offs, writearr + 1, 2); + aai_offs += 2; + } + break; + case JEDEC_WRDI: + aai_active = 0; + break; +#endif + default: + /* No special response. */ + break; + } + return 0; +} +#endif + int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { @@ -157,6 +332,9 @@ readarr[i] = 0xff; } +#if EMULATE_SPI_CHIP + emulate_spi_chip_response(writecnt, readcnt, writearr, readarr); +#endif msg_pspew("\n"); return 0; } -- http://www.hailfinger.org/

2 5

[commit] r1220 - trunk
by repository service 02 Nov '10

02 Nov '10

Author: hailfinger Date: Mon Nov 1 23:07:04 2010 New Revision: 1220 URL: http://flashrom.org/trac/flashrom/changeset/1220 Log: Add SPI flash emulation capability to the dummy programmer. You have to choose between - no emulation - ST M25P10.RES SPI flash chip (RES, page write) - SST SST25VF040.REMS SPI flash chip (REMS, byte write) - SST SST25VF032B SPI flash chip (RDID, AAI write) Example usage: flashrom -p dummy:emulate=SST25VF032B Flash image persistence is available as well. Example usage: flashrom -p dummy:image=dummy_simulator.rom Allow setting the max chunksize for page write with the dummy programmer. Example usage: flashrom -p dummy:spi_write_256_chunksize=5 Flash emulation is compiled in by default. This code helped me find and fix various bugs in the SPI write code as well as in the testsuite. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: David Hendricks <dhendrix(a)google.com> Modified: trunk/dummyflasher.c trunk/flash.h Modified: trunk/dummyflasher.c ============================================================================== --- trunk/dummyflasher.c Fri Oct 29 23:54:16 2010 (r1219) +++ trunk/dummyflasher.c Mon Nov 1 23:07:04 2010 (r1220) @@ -1,12 +1,11 @@ /* * This file is part of the flashrom project. * - * Copyright (C) 2009 Carl-Daniel Hailfinger + * Copyright (C) 2009,2010 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. + * the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of @@ -25,6 +24,43 @@ #include "chipdrivers.h" #include "programmer.h" +/* Remove the #define below if you don't want SPI flash chip emulation. */ +#define EMULATE_SPI_CHIP 1 + +#if EMULATE_SPI_CHIP +#define EMULATE_CHIP 1 +#include "spi.h" +#endif + +#if EMULATE_CHIP +#include <sys/types.h> +#include <sys/stat.h> +#endif + +#if EMULATE_CHIP +static uint8_t *flashchip_contents = NULL; +enum emu_chip { + EMULATE_NONE, + EMULATE_ST_M25P10_RES, + EMULATE_SST_SST25VF040_REMS, + EMULATE_SST_SST25VF032B, +}; +static enum emu_chip emu_chip = EMULATE_NONE; +static char *emu_persistent_image = NULL; +static int emu_chip_size = 0; +#if EMULATE_SPI_CHIP +static int emu_max_byteprogram_size = 0; +static int emu_max_aai_size = 0; +static int emu_jedec_se_size = 0; +static int emu_jedec_be_52_size = 0; +static int emu_jedec_be_d8_size = 0; +static int emu_jedec_ce_60_size = 0; +static int emu_jedec_ce_c7_size = 0; +#endif +#endif + +static int spi_write_256_chunksize = 256; + static void tolower_string(char *str) { for (; *str != '\0'; str++) @@ -34,6 +70,10 @@ int dummy_init(void) { char *bustext = NULL; + char *tmp = NULL; +#if EMULATE_CHIP + struct stat image_stat; +#endif msg_pspew("%s\n", __func__); @@ -65,12 +105,113 @@ if (buses_supported == CHIP_BUSTYPE_NONE) msg_pdbg("Support for all flash bus types disabled.\n"); free(bustext); + + tmp = extract_programmer_param("spi_write_256_chunksize"); + if (tmp) { + spi_write_256_chunksize = atoi(tmp); + free(tmp); + if (spi_write_256_chunksize < 1) { + msg_perr("invalid spi_write_256_chunksize\n"); + return 1; + } + } + +#if EMULATE_CHIP + tmp = extract_programmer_param("emulate"); + if (!tmp) { + msg_pdbg("Not emulating any flash chip.\n"); + /* Nothing else to do. */ + return 0; + } +#if EMULATE_SPI_CHIP + if (!strcmp(tmp, "M25P10.RES")) { + emu_chip = EMULATE_ST_M25P10_RES; + emu_chip_size = 128 * 1024; + emu_max_byteprogram_size = 128; + emu_max_aai_size = 0; + emu_jedec_se_size = 0; + emu_jedec_be_52_size = 0; + emu_jedec_be_d8_size = 32 * 1024; + emu_jedec_ce_60_size = 0; + emu_jedec_ce_c7_size = emu_chip_size; + msg_pdbg("Emulating ST M25P10.RES SPI flash chip (RES, page " + "write)\n"); + } + if (!strcmp(tmp, "SST25VF040.REMS")) { + emu_chip = EMULATE_SST_SST25VF040_REMS; + emu_chip_size = 512 * 1024; + emu_max_byteprogram_size = 1; + emu_max_aai_size = 0; + emu_jedec_se_size = 4 * 1024; + emu_jedec_be_52_size = 32 * 1024; + emu_jedec_be_d8_size = 0; + emu_jedec_ce_60_size = emu_chip_size; + emu_jedec_ce_c7_size = 0; + msg_pdbg("Emulating SST SST25VF040.REMS SPI flash chip (REMS, " + "byte write)\n"); + } + if (!strcmp(tmp, "SST25VF032B")) { + emu_chip = EMULATE_SST_SST25VF032B; + emu_chip_size = 4 * 1024 * 1024; + emu_max_byteprogram_size = 1; + emu_max_aai_size = 2; + emu_jedec_se_size = 4 * 1024; + emu_jedec_be_52_size = 32 * 1024; + emu_jedec_be_d8_size = 64 * 1024; + emu_jedec_ce_60_size = emu_chip_size; + emu_jedec_ce_c7_size = emu_chip_size; + msg_pdbg("Emulating SST SST25VF032B SPI flash chip (RDID, AAI " + "write)\n"); + } +#endif + if (emu_chip == EMULATE_NONE) { + msg_perr("Invalid chip specified for emulation: %s\n", tmp); + free(tmp); + return 1; + } + free(tmp); + flashchip_contents = malloc(emu_chip_size); + if (!flashchip_contents) { + msg_perr("Out of memory!\n"); + return 1; + } + msg_pdbg("Filling fake flash chip with 0xff, size %i\n", emu_chip_size); + memset(flashchip_contents, 0xff, emu_chip_size); + + emu_persistent_image = extract_programmer_param("image"); + if (!emu_persistent_image) { + /* Nothing else to do. */ + return 0; + } + if (!stat(emu_persistent_image, &image_stat)) { + msg_pdbg("Found persistent image %s, size %li ", + emu_persistent_image, (long)image_stat.st_size); + if (image_stat.st_size == emu_chip_size) { + msg_pdbg("matches.\n"); + msg_pdbg("Reading %s\n", emu_persistent_image); + read_buf_from_file(flashchip_contents, emu_chip_size, + emu_persistent_image); + } else { + msg_pdbg("doesn't match.\n"); + } + } +#endif return 0; } int dummy_shutdown(void) { msg_pspew("%s\n", __func__); +#if EMULATE_CHIP + if (emu_chip != EMULATE_NONE) { + if (emu_persistent_image) { + msg_pdbg("Writing %s\n", emu_persistent_image); + write_buf_to_file(flashchip_contents, emu_chip_size, + emu_persistent_image); + } + free(flashchip_contents); + } +#endif return 0; } @@ -140,6 +281,209 @@ return; } +#if EMULATE_SPI_CHIP +static int emulate_spi_chip_response(unsigned int writecnt, unsigned int readcnt, + const unsigned char *writearr, unsigned char *readarr) +{ + int offs; + static int aai_offs; + static int aai_active = 0; + + if (writecnt == 0) { + msg_perr("No command sent to the chip!\n"); + return 1; + } + /* TODO: Implement command blacklists here. */ + switch (writearr[0]) { + case JEDEC_RES: + if (emu_chip != EMULATE_ST_M25P10_RES) + break; + /* Respond with ST_M25P10_RES. */ + if (readcnt > 0) + readarr[0] = 0x10; + break; + case JEDEC_REMS: + if (emu_chip != EMULATE_SST_SST25VF040_REMS) + break; + /* Respond with SST_SST25VF040_REMS. */ + if (readcnt > 0) + readarr[0] = 0xbf; + if (readcnt > 1) + readarr[1] = 0x44; + break; + case JEDEC_RDID: + if (emu_chip != EMULATE_SST_SST25VF032B) + break; + /* Respond with SST_SST25VF032B. */ + if (readcnt > 0) + readarr[0] = 0xbf; + if (readcnt > 1) + readarr[1] = 0x25; + if (readcnt > 2) + readarr[2] = 0x4a; + break; + case JEDEC_RDSR: + memset(readarr, 0, readcnt); + if (aai_active) + memset(readarr, 1 << 6, readcnt); + break; + case JEDEC_READ: + offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; + /* Truncate to emu_chip_size. */ + offs %= emu_chip_size; + if (readcnt > 0) + memcpy(readarr, flashchip_contents + offs, readcnt); + break; + case JEDEC_BYTE_PROGRAM: + offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; + /* Truncate to emu_chip_size. */ + offs %= emu_chip_size; + if (writecnt < 5) { + msg_perr("BYTE PROGRAM size too short!\n"); + return 1; + } + if (writecnt - 4 > emu_max_byteprogram_size) { + msg_perr("Max BYTE PROGRAM size exceeded!\n"); + return 1; + } + memcpy(flashchip_contents + offs, writearr + 4, writecnt - 4); + break; + case JEDEC_AAI_WORD_PROGRAM: + if (!emu_max_aai_size) + break; + if (!aai_active) { + if (writecnt < JEDEC_AAI_WORD_PROGRAM_OUTSIZE) { + msg_perr("Initial AAI WORD PROGRAM size too " + "short!\n"); + return 1; + } + if (writecnt > JEDEC_AAI_WORD_PROGRAM_OUTSIZE) { + msg_perr("Initial AAI WORD PROGRAM size too " + "long!\n"); + return 1; + } + aai_active = 1; + aai_offs = writearr[1] << 16 | writearr[2] << 8 | + writearr[3]; + /* Truncate to emu_chip_size. */ + aai_offs %= emu_chip_size; + memcpy(flashchip_contents + aai_offs, writearr + 4, 2); + aai_offs += 2; + } else { + if (writecnt < JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE) { + msg_perr("Continuation AAI WORD PROGRAM size " + "too short!\n"); + return 1; + } + if (writecnt > JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE) { + msg_perr("Continuation AAI WORD PROGRAM size " + "too long!\n"); + return 1; + } + memcpy(flashchip_contents + aai_offs, writearr + 1, 2); + aai_offs += 2; + } + break; + case JEDEC_WRDI: + if (!emu_max_aai_size) + break; + aai_active = 0; + break; + case JEDEC_SE: + if (!emu_jedec_se_size) + break; + if (writecnt != JEDEC_SE_OUTSIZE) { + msg_perr("SECTOR ERASE 0x20 outsize invalid!\n"); + return 1; + } + if (readcnt != JEDEC_SE_INSIZE) { + msg_perr("SECTOR ERASE 0x20 insize invalid!\n"); + return 1; + } + offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; + if (offs & (emu_jedec_se_size - 1)) + msg_pdbg("Unaligned SECTOR ERASE 0x20\n"); + offs &= ~(emu_jedec_se_size - 1); + memset(flashchip_contents + offs, 0xff, emu_jedec_se_size); + break; + case JEDEC_BE_52: + if (!emu_jedec_be_52_size) + break; + if (writecnt != JEDEC_BE_52_OUTSIZE) { + msg_perr("BLOCK ERASE 0x52 outsize invalid!\n"); + return 1; + } + if (readcnt != JEDEC_BE_52_INSIZE) { + msg_perr("BLOCK ERASE 0x52 insize invalid!\n"); + return 1; + } + offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; + if (offs & (emu_jedec_be_52_size - 1)) + msg_pdbg("Unaligned BLOCK ERASE 0x52\n"); + offs &= ~(emu_jedec_be_52_size - 1); + memset(flashchip_contents + offs, 0xff, emu_jedec_be_52_size); + break; + case JEDEC_BE_D8: + if (!emu_jedec_be_d8_size) + break; + if (writecnt != JEDEC_BE_D8_OUTSIZE) { + msg_perr("BLOCK ERASE 0xd8 outsize invalid!\n"); + return 1; + } + if (readcnt != JEDEC_BE_D8_INSIZE) { + msg_perr("BLOCK ERASE 0xd8 insize invalid!\n"); + return 1; + } + offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; + if (offs & (emu_jedec_be_d8_size - 1)) + msg_pdbg("Unaligned BLOCK ERASE 0xd8\n"); + offs &= ~(emu_jedec_be_d8_size - 1); + memset(flashchip_contents + offs, 0xff, emu_jedec_be_d8_size); + break; + case JEDEC_CE_60: + if (!emu_jedec_ce_60_size) + break; + if (writecnt != JEDEC_CE_60_OUTSIZE) { + msg_perr("CHIP ERASE 0x60 outsize invalid!\n"); + return 1; + } + if (readcnt != JEDEC_CE_60_INSIZE) { + msg_perr("CHIP ERASE 0x60 insize invalid!\n"); + return 1; + } + offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; + if (offs & (emu_jedec_ce_60_size - 1)) + msg_pdbg("Unaligned CHIP ERASE 0x60\n"); + offs &= ~(emu_jedec_ce_60_size - 1); + /* emu_jedec_ce_60_size is emu_chip_size. */ + memset(flashchip_contents + offs, 0xff, emu_jedec_ce_60_size); + break; + case JEDEC_CE_C7: + if (!emu_jedec_ce_c7_size) + break; + if (writecnt != JEDEC_CE_C7_OUTSIZE) { + msg_perr("CHIP ERASE 0xc7 outsize invalid!\n"); + return 1; + } + if (readcnt != JEDEC_CE_C7_INSIZE) { + msg_perr("CHIP ERASE 0xc7 insize invalid!\n"); + return 1; + } + offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; + if (offs & (emu_jedec_ce_c7_size - 1)) + msg_pdbg("Unaligned CHIP ERASE 0xc7\n"); + offs &= ~(emu_jedec_ce_c7_size - 1); + /* emu_jedec_ce_c7_size is emu_chip_size. */ + memset(flashchip_contents, 0xff, emu_jedec_ce_c7_size); + break; + default: + /* No special response. */ + break; + } + return 0; +} +#endif + int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { @@ -151,12 +495,27 @@ for (i = 0; i < writecnt; i++) msg_pspew(" 0x%02x", writearr[i]); + /* Response for unknown commands and missing chip is 0xff. */ + memset(readarr, 0xff, readcnt); +#if EMULATE_SPI_CHIP + switch (emu_chip) { + case EMULATE_ST_M25P10_RES: + case EMULATE_SST_SST25VF040_REMS: + case EMULATE_SST_SST25VF032B: + if (emulate_spi_chip_response(writecnt, readcnt, writearr, + readarr)) { + msg_perr("Invalid command sent to flash chip!\n"); + return 1; + } + break; + default: + break; + } +#endif msg_pspew(" reading %u bytes:", readcnt); for (i = 0; i < readcnt; i++) { - msg_pspew(" 0xff"); - readarr[i] = 0xff; + msg_pspew(" 0x%02x", readarr[i]); } - msg_pspew("\n"); return 0; } @@ -167,11 +526,8 @@ return spi_read_chunked(flash, buf, start, len, 64 * 1024); } -/* Is is impossible to trigger this code path because dummyflasher probing will - * never be successful, and the current frontend refuses to write in that case. - * Other frontends may allow writing even for non-detected chips, though. - */ int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len) { - return spi_write_chunked(flash, buf, start, len, 256); + return spi_write_chunked(flash, buf, start, len, + spi_write_256_chunksize); } Modified: trunk/flash.h ============================================================================== --- trunk/flash.h Fri Oct 29 23:54:16 2010 (r1219) +++ trunk/flash.h Mon Nov 1 23:07:04 2010 (r1220) @@ -207,6 +207,8 @@ void list_programmers_linebreak(int startcol, int cols, int paren); int selfcheck(void); int doit(struct flashchip *flash, int force, char *filename, int read_it, int write_it, int erase_it, int verify_it); +int read_buf_from_file(unsigned char *buf, unsigned long size, char *filename); +int write_buf_to_file(unsigned char *buf, unsigned long size, char *filename); #define OK 0 #define NT 1 /* Not tested */

1 0

flashrom output from cardbus sata sil adapter
by cz172638＠gmail.com 01 Nov '10

01 Nov '10

################# FLASHROM OUTPUT ############################## flashrom -p satasii flashrom v0.9.2-r1001 on Linux 2.6.34.7-61.fc13.x86_64 (x86_64), built with libpci 3.1.6, GCC 4.4.4 20100503 (Red Hat 4.4.4-2) flashrom is free software, get the source code at http://www.flashrom.org Found "Silicon Image SiI 3512 [SATALink/SATARaid] SATA Ctrl" (1095:3512, BDF 16:00.0). === This PCI device is UNTESTED. Please report the 'flashrom -p xxxx' output to flashrom(a)flashrom.org if it works for you. Thank you for your help! === Mapping SATA SIL registers at 0xc4000000, unaligned size 0x100. Warning: Flash seems unconnected. Calibrating delay loop... OK. No EEPROM/flash device found. Note: flashrom can never write if the flash chip isn't found automatically. ################# FLASHROM OUTPUT ##############################

2 1

[patch] partial write test script
by David Hendricks 30 Oct '10

30 Oct '10

After a few tries at manually verifying partial writes and realizing that it's awfully tedious to do any exhaustive testing, I hastily threw together a shell script to help automate the process. Since there are others on this list doing similar things, I figured it might be helpful to throw it up here. Note: It's unfinished and probably has bugs, but I figure it's at least a start, even if only to kickstart a conversation about how to test partial writes in a standard and useful manner. Signed-off-by: David Hendricks <dhendrix(a)google.com> -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc.

2 9

[commit] r1219 - trunk/util
by repository service 30 Oct '10

30 Oct '10

Author: hailfinger Date: Fri Oct 29 23:54:16 2010 New Revision: 1219 URL: http://flashrom.org/trac/flashrom/changeset/1219 Log: Replace "$FLASHROM_PARAM" with ${FLASHROM_PARAM} in util/flashrom_partial_write_test.sh to avoid passing in quoted parameters which can cause problems especially if FLASHROM_PARAM is empty or contains spaces. Signed-off-by: David Hendricks <dhendrix(a)google.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/util/flashrom_partial_write_test.sh Modified: trunk/util/flashrom_partial_write_test.sh ============================================================================== --- trunk/util/flashrom_partial_write_test.sh Fri Oct 29 22:17:41 2010 (r1218) +++ trunk/util/flashrom_partial_write_test.sh Fri Oct 29 23:54:16 2010 (r1219) @@ -81,13 +81,13 @@ echo "Reading BIOS image" BIOS="bios.bin" -flashrom "$FLASHROM_PARAM" -r "$BIOS" > /dev/null +flashrom ${FLASHROM_PARAM} -r "$BIOS" > /dev/null echo "Original image saved as ${BIOS}" # $1: exit code do_exit() { echo "restoring original bios image using system's flashrom" - flashrom "$FLASHROM_PARAM" -w "$BIOS" + flashrom ${FLASHROM_PARAM} -w "$BIOS" echo "test files remain in ${TMPDIR}" cd "$OLDDIR" exit "$1" @@ -157,7 +157,7 @@ dd if=${ZERO_4K} of=${TESTFILE} bs=1 conv=notrunc seek=${offset} 2> /dev/null dd if=${FF_4K} of=${TESTFILE} bs=1 conv=notrunc seek=$((${offset} + 4096)) 2> /dev/null - ./flashrom "$FLASHROM_PARAM" -l layout_4k_aligned.txt -i 00_${i} -i ff_${i} -w "$TESTFILE" > /dev/null + ./flashrom ${FLASHROM_PARAM} -l layout_4k_aligned.txt -i 00_${i} -i ff_${i} -w "$TESTFILE" > /dev/null if [ "$?" != "0" ] ; then echo "partial flash failed on iteration ${i}" echo "Result: FAIL" @@ -166,7 +166,7 @@ # download the entire ROM image and use diff to compare to ensure # flashrom logic does not violate user-specified regions - flashrom "$FLASHROM_PARAM" -r difftest.bin > /dev/null + flashrom ${FLASHROM_PARAM} -r difftest.bin > /dev/null diff -q difftest.bin "$TESTFILE" if [ "$?" != "0" ] ; then echo "diff test failed on iteration ${i}" @@ -239,7 +239,7 @@ " > layout_unaligned.txt # reset the test file and ROM to the original state -flashrom "$FLASHROM_PARAM" -w "$BIOS" +flashrom ${FLASHROM_PARAM} -w "$BIOS" cp "$BIOS" "$TESTFILE" i=0 @@ -256,7 +256,7 @@ dd if=${ZERO_4K} of=${TESTFILE} bs=1 conv=notrunc seek=${offset} 2> /dev/null dd if=${FF_4K} of=${TESTFILE} bs=1 conv=notrunc seek=$((${offset} + 4096)) count=writelen 2> /dev/null - ./flashrom "$FLASHROM_PARAM" -l layout_unaligned.txt -i 00_${i} -i ff_${i} -w "$TESTFILE" > /dev/null + ./flashrom ${FLASHROM_PARAM} -l layout_unaligned.txt -i 00_${i} -i ff_${i} -w "$TESTFILE" > /dev/null if [ "$?" != "0" ] ; then echo "partial flash failed on iteration ${i}" echo "Result: FAIL" @@ -265,7 +265,7 @@ # download the entire ROM image and use diff to compare to ensure # flashrom logic does not violate user-specified regions - flashrom "$FLASHROM_PARAM" -r difftest.bin > /dev/null + flashrom ${FLASHROM_PARAM} -r difftest.bin > /dev/null diff -q difftest.bin "$TESTFILE" if [ "$?" != "0" ] ; then echo "diff test failed on iteration ${i}"

1 0

Success story for Assus M3A78-EH mainboard
by Andrei Slavoiu 30 Oct '10

30 Oct '10

Even if the chip itself is mentioned as working on the supported hardware page, the mainboard is not on the list so I attached the results for each operation.

1 0

[commit] r1218 - in trunk: . util
by repository service 29 Oct '10

29 Oct '10

Author: hailfinger Date: Fri Oct 29 22:17:41 2010 New Revision: 1218 URL: http://flashrom.org/trac/flashrom/changeset/1218 Log: flashrom torture test script. Focus is on partial write and layout functionality. Minor modifications by Carl-Daniel Hailfinger. Signed-off-by: David Hendricks <dhendrix(a)google.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Added: trunk/util/flashrom_partial_write_test.sh (contents, props changed) Modified: trunk/layout.c Modified: trunk/layout.c ============================================================================== --- trunk/layout.c Thu Oct 28 00:07:11 2010 (r1217) +++ trunk/layout.c Fri Oct 29 22:17:41 2010 (r1218) @@ -31,7 +31,7 @@ #endif static int romimages = 0; -#define MAX_ROMLAYOUT 16 +#define MAX_ROMLAYOUT 32 typedef struct { unsigned int start; Added: trunk/util/flashrom_partial_write_test.sh ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ trunk/util/flashrom_partial_write_test.sh Fri Oct 29 22:17:41 2010 (r1218) @@ -0,0 +1,281 @@ +#!/bin/sh +# +# Copyright (C) 2010 Google Inc. +# Written by David Hendricks for Google Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +# +# This script attempts to test Flashrom partial write capability by writing +# patterns of 0xff and 0x00 bytes to the lowest 128KB of flash. 128KB is chosen +# since 64KB is usually the largest possible block size, so we will try to +# cover at least two blocks with this test. + +EXIT_SUCCESS=0 +EXIT_FAILURE=1 + +# The copy of flashrom to test. If unset, we'll assume the user wants to test +# a newly built flashrom binary in the parent directory (this script should +# reside in flashrom/util). +if [ -z "$FLASHROM" ] ; then + FLASHROM="../flashrom" +fi +echo "testing flashrom binary: ${FLASHROM}" + +OLDDIR=$(pwd) +if [ -z "$TMPDIR" ]; then + TMPDIR=$(mktemp -d) # test data location +fi + +ZERO_4K="00_4k.bin" +FF_4K="ff_4k.bin" +FF_4K_TEXT="ff_4k.txt" + +TESTFILE="test.bin" + +which uuencode > /dev/null +if [ "$?" != "0" ] ; then + echo "uuencode is required to use this script" + exit $EXIT_FAILURE +fi + +which flashrom > /dev/null +if [ "$?" != "0" ] ; then + echo "Please install a stable version of flashrom in your path." + echo "This will be used to compare the test flashrom binary and " + echo "restore your firmware image at the end of the test." + exit $EXIT_FAILURE +fi + +# Keep a copy of flashrom with the test data +cp "$FLASHROM" "${TMPDIR}/" +cd "$TMPDIR" +echo "Running test in ${TMPDIR}" + +# Make 4k worth of 0xff bytes +echo "begin 640 $FF_4K" > "$FF_4K_TEXT" +for i in `seq 0 90` ; do + echo "M____________________________________________________________" >> "$FF_4K_TEXT" +done +echo "!_P``" >> "$FF_4K_TEXT" +echo "\`" >> "$FF_4K_TEXT" +echo "end" >> "$FF_4K_TEXT" +uudecode -o "$FF_4K" "$FF_4K_TEXT" +rm -f "$FF_4K_TEXT" + +# Make 4k worth of 0x00 bytes +dd if=/dev/zero of="$ZERO_4K" bs=1 count=4096 2> /dev/null +echo "ffh pattern written in ${FF_4K}" +echo "00h pattern written in ${ZERO_4K}" + +echo "Reading BIOS image" +BIOS="bios.bin" +flashrom "$FLASHROM_PARAM" -r "$BIOS" > /dev/null +echo "Original image saved as ${BIOS}" + +# $1: exit code +do_exit() { + echo "restoring original bios image using system's flashrom" + flashrom "$FLASHROM_PARAM" -w "$BIOS" + echo "test files remain in ${TMPDIR}" + cd "$OLDDIR" + exit "$1" +} + +# +# Actual tests are performed below. +# +NUM_REGIONS=16 + +# Make a layout - 4K regions on 4K boundaries. This will test basic +# functionality of erasing and writing specific blocks. +echo " +0x000000:0x000fff 00_0 +0x001000:0x001fff ff_0 + +0x002000:0x002fff 00_1 +0x003000:0x003fff ff_1 + +0x004000:0x004fff 00_2 +0x005000:0x005fff ff_2 + +0x006000:0x006fff 00_3 +0x007000:0x007fff ff_3 + +0x008000:0x008fff 00_4 +0x009000:0x009fff ff_4 + +0x00a000:0x00afff 00_5 +0x00b000:0x00bfff ff_5 + +0x00c000:0x00cfff 00_6 +0x00d000:0x00dfff ff_6 + +0x00e000:0x00efff 00_7 +0x00f000:0x00ffff ff_7 + +0x010000:0x010fff 00_8 +0x011000:0x011fff ff_8 + +0x012000:0x012fff 00_9 +0x013000:0x013fff ff_9 + +0x014000:0x014fff 00_10 +0x015000:0x015fff ff_10 + +0x016000:0x016fff 00_11 +0x017000:0x017fff ff_11 + +0x018000:0x018fff 00_12 +0x019000:0x019fff ff_12 + +0x01a000:0x01afff 00_13 +0x01b000:0x01bfff ff_13 + +0x01c000:0x01cfff 00_14 +0x01d000:0x01dfff ff_14 + +0x01e000:0x01efff 00_15 +0x01f000:0x01ffff ff_15 +" > layout_4k_aligned.txt + +cp "$BIOS" "$TESTFILE" +i=0 +while [ $i -lt $NUM_REGIONS ] ; do + offset=$((${i} * 8192)) + dd if=${ZERO_4K} of=${TESTFILE} bs=1 conv=notrunc seek=${offset} 2> /dev/null + dd if=${FF_4K} of=${TESTFILE} bs=1 conv=notrunc seek=$((${offset} + 4096)) 2> /dev/null + + ./flashrom "$FLASHROM_PARAM" -l layout_4k_aligned.txt -i 00_${i} -i ff_${i} -w "$TESTFILE" > /dev/null + if [ "$?" != "0" ] ; then + echo "partial flash failed on iteration ${i}" + echo "Result: FAIL" + do_exit "$EXIT_FAILURE" + fi + + # download the entire ROM image and use diff to compare to ensure + # flashrom logic does not violate user-specified regions + flashrom "$FLASHROM_PARAM" -r difftest.bin > /dev/null + diff -q difftest.bin "$TESTFILE" + if [ "$?" != "0" ] ; then + echo "diff test failed on iteration ${i}" + echo "Result: FAIL" + do_exit "$EXIT_FAILURE" + fi + rm -f difftest.bin + + i=$((${i} + 1)) +done + +# Make a layout - 4K regions on 4.5K boundaries. This will help find problems +# with logic that only operates on part of a block. For example, if a user +# wishes to re-write a fraction of a block, then: +# 1. The whole block must be erased. +# 2. The old content must be restored at unspecified offsets. +# 3. The new content must be written at specified offsets. +# +# Note: The last chunk of 0xff bytes is only 2K as to avoid overrunning a 128KB +# test image. +# +echo " +0x000800:0x0017ff 00_0 +0x001800:0x0027ff ff_0 + +0x002800:0x0037ff 00_1 +0x003800:0x0047ff ff_1 + +0x004800:0x0057ff 00_2 +0x005800:0x0067ff ff_2 + +0x006800:0x0077ff 00_3 +0x007800:0x0087ff ff_3 + +0x008800:0x0097ff 00_4 +0x009800:0x00a7ff ff_4 + +0x00a800:0x00b7ff 00_5 +0x00b800:0x00c7ff ff_5 + +0x00c800:0x00d7ff 00_6 +0x00d800:0x00e7ff ff_6 + +0x00e800:0x00f7ff 00_7 +0x00f800:0x0107ff ff_7 + +0x010800:0x0117ff 00_8 +0x011800:0x0127ff ff_8 + +0x012800:0x0137ff 00_9 +0x013800:0x0147ff ff_9 + +0x014800:0x0157ff 00_10 +0x015800:0x0167ff ff_10 + +0x016800:0x0177ff 00_11 +0x017800:0x0187ff ff_11 + +0x018800:0x0197ff 00_12 +0x019800:0x01a7ff ff_12 + +0x01a800:0x01b7ff 00_13 +0x01b800:0x01c7ff ff_13 + +0x01c800:0x01d7ff 00_14 +0x01d800:0x01e7ff ff_14 + +0x01e800:0x01f7ff 00_15 +0x01f800:0x01ffff ff_15 +" > layout_unaligned.txt + +# reset the test file and ROM to the original state +flashrom "$FLASHROM_PARAM" -w "$BIOS" +cp "$BIOS" "$TESTFILE" + +i=0 +while [ $i -lt $NUM_REGIONS ] ; do + offset=$(($((${i} * 8192)) + 2048)) + # Protect against too long write + writelen=4096 + if [ $((${offset} + 4096 + 4096)) -ge 131072 ]; then + writelen=$((131072 - $((${offset} + 4096)))) + if [ ${writelen} -lt 0 ]; then + writelen=0 + fi + fi + dd if=${ZERO_4K} of=${TESTFILE} bs=1 conv=notrunc seek=${offset} 2> /dev/null + dd if=${FF_4K} of=${TESTFILE} bs=1 conv=notrunc seek=$((${offset} + 4096)) count=writelen 2> /dev/null + + ./flashrom "$FLASHROM_PARAM" -l layout_unaligned.txt -i 00_${i} -i ff_${i} -w "$TESTFILE" > /dev/null + if [ "$?" != "0" ] ; then + echo "partial flash failed on iteration ${i}" + echo "Result: FAIL" + do_exit "$EXIT_FAILURE" + fi + + # download the entire ROM image and use diff to compare to ensure + # flashrom logic does not violate user-specified regions + flashrom "$FLASHROM_PARAM" -r difftest.bin > /dev/null + diff -q difftest.bin "$TESTFILE" + if [ "$?" != "0" ] ; then + echo "diff test failed on iteration ${i}" + echo "Result: FAIL" + do_exit "$EXIT_FAILURE" + fi + rm -f difftest.bin + + i=$((${i} + 1)) +done + +echo "Result: PASS" +do_exit "$EXIT_SUCCESS"

1 0

[PATCH] Fix offset calculation for partial SPI programming
by Carl-Daniel Hailfinger 28 Oct '10

28 Oct '10

Fix internal offset calculations for SPI BYTE PROGRAM and SPI AAI PROGRAM. The bug was invisible so far because we always started at offset 0. The pending partial write patch uses nonzero start offsets and trips over this bug. Clarify a few comments in IT87 SPI. Thanks to Idwer Vollering for reporting write breakage with my latest partial write patch. This patch should fix the underlying problem. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-partial_write_spi_fix_offset_calc/it87spi.c =================================================================== --- flashrom-partial_write_spi_fix_offset_calc/it87spi.c (Revision 1216) +++ flashrom-partial_write_spi_fix_offset_calc/it87spi.c (Arbeitskopie) @@ -339,7 +339,10 @@ { /* * IT8716F only allows maximum of 512 kb SPI chip size for memory - * mapped access. It also can't write more than 1+3+256 bytes at once. + * mapped access. It also can't write more than 1+3+256 bytes at once, + * so page_size > 256 bytes needs a fallback. + * FIXME: Split too big page writes into chunks IT87* can handle instead + * of degrading to single-byte program. */ if ((programmer == PROGRAMMER_IT87SPI) || (flash->total_size * 1024 > 512 * 1024) || @@ -349,9 +352,8 @@ int lenhere; if (start % flash->page_size) { - /* start to the end of the page or start + len, - * whichever is smaller. Page length is hardcoded to - * 256 bytes (IT87 SPI hardware limitation). + /* start to the end of the page or to start + len, + * whichever is smaller. */ lenhere = min(len, flash->page_size - start % flash->page_size); spi_chip_write_1(flash, buf, start, lenhere); @@ -360,7 +362,6 @@ buf += lenhere; } - /* FIXME: Handle chips which have max writechunk size >1 and <256. */ while (len >= flash->page_size) { it8716f_spi_page_program(flash, buf, start); start += flash->page_size; Index: flashrom-partial_write_spi_fix_offset_calc/spi25.c =================================================================== --- flashrom-partial_write_spi_fix_offset_calc/spi25.c (Revision 1216) +++ flashrom-partial_write_spi_fix_offset_calc/spi25.c (Arbeitskopie) @@ -1309,7 +1309,7 @@ int i, result = 0; for (i = start; i < start + len; i++) { - result = spi_byte_program(i, buf[i]); + result = spi_byte_program(i, buf[i - start]); if (result) return 1; while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) @@ -1377,6 +1377,14 @@ if (spi_chip_write_1(flash, buf, start, start % 2)) return SPI_GENERIC_ERROR; pos += start % 2; + cmds[1].writearr = (const unsigned char[]){ + JEDEC_AAI_WORD_PROGRAM, + (pos >> 16) & 0xff, + (pos >> 8) & 0xff, + (pos & 0xff), + buf[pos - start], + buf[pos - start + 1] + }; /* Do not return an error for now. */ //return SPI_GENERIC_ERROR; } @@ -1406,8 +1414,8 @@ /* Are there at least two more bytes to write? */ while (pos < start + len - 1) { - cmd[1] = buf[pos++]; - cmd[2] = buf[pos++]; + cmd[1] = buf[pos++ - start]; + cmd[2] = buf[pos++ - start]; spi_send_command(JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE, 0, cmd, NULL); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) programmer_delay(10); @@ -1420,7 +1428,7 @@ /* Write remaining byte (if any). */ if (pos < start + len) { - if (spi_chip_write_1(flash, buf + pos, pos, pos % 2)) + if (spi_chip_write_1(flash, buf + pos - start, pos, pos % 2)) return SPI_GENERIC_ERROR; pos += pos % 2; } -- http://www.hailfinger.org/

2 2

[commit] r1217 - trunk
by repository service 28 Oct '10

28 Oct '10

Author: hailfinger Date: Thu Oct 28 00:07:11 2010 New Revision: 1217 URL: http://flashrom.org/trac/flashrom/changeset/1217 Log: Fix internal offset calculations for SPI BYTE PROGRAM and SPI AAI PROGRAM. The bug was invisible so far because we always started at offset 0. The pending partial write patch uses nonzero start offsets and trips over this bug. Clarify a few comments in IT87 SPI. Thanks to Idwer Vollering for reporting write breakage with my latest partial write patch. This should fix the underlying problem. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Idwer Vollering <vidwer(a)gmail.com> Modified: trunk/it87spi.c trunk/spi25.c Modified: trunk/it87spi.c ============================================================================== --- trunk/it87spi.c Wed Oct 20 23:13:19 2010 (r1216) +++ trunk/it87spi.c Thu Oct 28 00:07:11 2010 (r1217) @@ -339,7 +339,10 @@ { /* * IT8716F only allows maximum of 512 kb SPI chip size for memory - * mapped access. It also can't write more than 1+3+256 bytes at once. + * mapped access. It also can't write more than 1+3+256 bytes at once, + * so page_size > 256 bytes needs a fallback. + * FIXME: Split too big page writes into chunks IT87* can handle instead + * of degrading to single-byte program. */ if ((programmer == PROGRAMMER_IT87SPI) || (flash->total_size * 1024 > 512 * 1024) || @@ -349,9 +352,8 @@ int lenhere; if (start % flash->page_size) { - /* start to the end of the page or start + len, - * whichever is smaller. Page length is hardcoded to - * 256 bytes (IT87 SPI hardware limitation). + /* start to the end of the page or to start + len, + * whichever is smaller. */ lenhere = min(len, flash->page_size - start % flash->page_size); spi_chip_write_1(flash, buf, start, lenhere); @@ -360,7 +362,6 @@ buf += lenhere; } - /* FIXME: Handle chips which have max writechunk size >1 and <256. */ while (len >= flash->page_size) { it8716f_spi_page_program(flash, buf, start); start += flash->page_size; Modified: trunk/spi25.c ============================================================================== --- trunk/spi25.c Wed Oct 20 23:13:19 2010 (r1216) +++ trunk/spi25.c Thu Oct 28 00:07:11 2010 (r1217) @@ -1309,7 +1309,7 @@ int i, result = 0; for (i = start; i < start + len; i++) { - result = spi_byte_program(i, buf[i]); + result = spi_byte_program(i, buf[i - start]); if (result) return 1; while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) @@ -1377,6 +1377,14 @@ if (spi_chip_write_1(flash, buf, start, start % 2)) return SPI_GENERIC_ERROR; pos += start % 2; + cmds[1].writearr = (const unsigned char[]){ + JEDEC_AAI_WORD_PROGRAM, + (pos >> 16) & 0xff, + (pos >> 8) & 0xff, + (pos & 0xff), + buf[pos - start], + buf[pos - start + 1] + }; /* Do not return an error for now. */ //return SPI_GENERIC_ERROR; } @@ -1406,8 +1414,8 @@ /* Are there at least two more bytes to write? */ while (pos < start + len - 1) { - cmd[1] = buf[pos++]; - cmd[2] = buf[pos++]; + cmd[1] = buf[pos++ - start]; + cmd[2] = buf[pos++ - start]; spi_send_command(JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE, 0, cmd, NULL); while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP) programmer_delay(10); @@ -1420,7 +1428,7 @@ /* Write remaining byte (if any). */ if (pos < start + len) { - if (spi_chip_write_1(flash, buf + pos, pos, pos % 2)) + if (spi_chip_write_1(flash, buf + pos - start, pos, pos % 2)) return SPI_GENERIC_ERROR; pos += pos % 2; }

1 0

flashrom -V > stdout
by "Marc-Dietrich Stüwe" 27 Oct '10

27 Oct '10

Hallo flashrom people, Attachment is for your Info ! I send the output of "flashrom -V" to flashrom(a)flashrom.org to help finish support for a chipset. Regards Marc Stüwe

1 0

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