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Re: [flashrom] [PATCH] Add W25Q....W series.
by Stefan Tauner 09 Jun '13

09 Jun '13

On Fri, 22 Feb 2013 17:07:00 +0100 Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> wrote: > - Use ".V" (and "_V" in macros) for 3.3V Winbond 25Q chips. > Rename the existing chips and add a .voltage entry where it was missing. > - Use ".W" (and "_W" in macros) for 1.8V Winbond 25Q chips. > - Add a feature flag for QPI-enabled chips: FEATURE_QPI. > - Add W25Q20.W, W25Q40.W, W25Q80.W, W25Q16.W, W25Q32.W, W25Q64.W. > > Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> > --- > […] > diff --git a/print.c b/print.c > […] > - B("ASRock", "H67M", BAD, "http://www.asrock.com/mb/overview.asp?Model=H67M", "Probing works (Winbond W25Q64, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), > + B("ASRock", "H67M", BAD, "http://www.asrock.com/mb/overview.asp?Model=H67M", "Probing works (Winbond W25Q64.V, 8192 kB, SPI), but parts of the flash are problematic: descriptor is r/o (conforming to ICH reqs), ME region is locked."), > […] Self-acked and committed in r1677, but without the changes in print.c. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[commit] r1677 - trunk
by repository service 09 Jun '13

09 Jun '13

Author: stefanct Date: Sun Jun 9 16:00:46 2013 New Revision: 1677 URL: http://flashrom.org/trac/flashrom/changeset/1677 Log: Add W25Q...W series. - Use ".V" (and "_V" in macros) for 3.3V Winbond 25Q chips. Rename the existing chips and add a .voltage entry where it was missing. - Use ".W" (and "_W" in macros) for 1.8V Winbond 25Q chips. - Add W25Q20.W, W25Q40.W, W25Q80.W, W25Q16.W, W25Q32.W, W25Q64.W. Based on chromiumos' 469707f0d9b7d81b6c6bb2cace13f09db70f4382 http://git.chromium.org/gitweb/?p=chromiumos/third_party/flashrom.git;a=com… Signed-off-by: Yung-Chieh Lo <yjlou%chromium.org(a)gtempaccount.com> Signed-off-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at> Modified: trunk/flashchips.c trunk/flashchips.h Modified: trunk/flashchips.c ============================================================================== --- trunk/flashchips.c Sat Jun 1 02:30:31 2013 (r1676) +++ trunk/flashchips.c Sun Jun 9 16:00:46 2013 (r1677) @@ -10007,13 +10007,14 @@ { .vendor = "Winbond", - .name = "W25Q80", + .name = "W25Q80.V", .bustype = BUS_SPI, .manufacture_id = WINBOND_NEX_ID, - .model_id = WINBOND_NEX_W25Q80, + .model_id = WINBOND_NEX_W25Q80_V, .total_size = 1024, .page_size = 256, - /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42 */ + /* supports SFDP */ + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, @@ -10046,13 +10047,14 @@ { .vendor = "Winbond", - .name = "W25Q16", + .name = "W25Q16.V", .bustype = BUS_SPI, .manufacture_id = WINBOND_NEX_ID, - .model_id = WINBOND_NEX_W25Q16, + .model_id = WINBOND_NEX_W25Q16_V, .total_size = 2048, .page_size = 256, - /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42 */ + /* supports SFDP */ + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, @@ -10085,13 +10087,14 @@ { .vendor = "Winbond", - .name = "W25Q32", + .name = "W25Q32.V", .bustype = BUS_SPI, .manufacture_id = WINBOND_NEX_ID, - .model_id = WINBOND_NEX_W25Q32, + .model_id = WINBOND_NEX_W25Q32_V, .total_size = 4096, .page_size = 256, - /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42 */ + /* supports SFDP */ + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, @@ -10124,13 +10127,14 @@ { .vendor = "Winbond", - .name = "W25Q64", + .name = "W25Q64.V", .bustype = BUS_SPI, .manufacture_id = WINBOND_NEX_ID, - .model_id = WINBOND_NEX_W25Q64, + .model_id = WINBOND_NEX_W25Q64_V, .total_size = 8192, .page_size = 256, - /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42 */ + /* supports SFDP */ + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, @@ -10158,17 +10162,19 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, }, { .vendor = "Winbond", - .name = "W25Q128", + .name = "W25Q128.V", .bustype = BUS_SPI, .manufacture_id = WINBOND_NEX_ID, - .model_id = WINBOND_NEX_W25Q128, + .model_id = WINBOND_NEX_W25Q128_V, .total_size = 16384, .page_size = 256, - /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42 */ + /* supports SFDP */ + /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, .tested = TEST_OK_PROBE, .probe = probe_spi_rdid, @@ -10196,6 +10202,244 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .voltage = {2700, 3600}, + }, + + { + .vendor = "Winbond", + .name = "W25Q20.W", + .bustype = BUS_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = WINBOND_NEX_W25Q20_W, + .total_size = 256, + .page_size = 256, + /* OTP: 256B total; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 64} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 8} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 4} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {1700, 1950}, /* Fast read (0x0B) and multi I/O supported */ + }, + + { + .vendor = "Winbond", + .name = "W25Q40.W", + .bustype = BUS_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = WINBOND_NEX_W25Q40_W, + .total_size = 512, + .page_size = 256, + /* OTP: 256B total; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 16} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {1700, 1950}, /* Fast read (0x0B) and multi I/O supported */ + }, + + { + .vendor = "Winbond", + .name = "W25Q80.W", + .bustype = BUS_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = WINBOND_NEX_W25Q80_W, + .total_size = 1024, + .page_size = 256, + /* OTP: 256B total; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 256} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 32} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 16} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {1 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {1 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {1700, 1950}, /* Fast read (0x0B) and multi I/O supported */ + }, + + { + .vendor = "Winbond", + .name = "W25Q16.W", + .bustype = BUS_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = WINBOND_NEX_W25Q16_W, + .total_size = 2048, + .page_size = 256, + /* OTP: 256B total; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ + /* QPI enable 0x38, disable 0xFF */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 512} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 64} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 32} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {2 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {1700, 1950}, /* Fast read (0x0B) and multi I/O supported */ + }, + + { + .vendor = "Winbond", + .name = "W25Q32.W", + .bustype = BUS_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = WINBOND_NEX_W25Q32_W, + .total_size = 4096, + .page_size = 256, + /* OTP: 256B total; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ + /* QPI enable 0x38, disable 0xFF */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 1024} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 128} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 64} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {4 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {1700, 1950}, /* Fast read (0x0B) and multi I/O supported */ + }, + + { + .vendor = "Winbond", + .name = "W25Q64.W", + .bustype = BUS_SPI, + .manufacture_id = WINBOND_NEX_ID, + .model_id = WINBOND_NEX_W25Q64_W, + .total_size = 8192, + .page_size = 256, + /* OTP: 256B total; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ + /* QPI enable 0x38, disable 0xFF */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI, + .tested = TEST_UNTESTED, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 2048} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 256} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 128} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {8 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */ + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {1700, 1950}, /* Fast read (0x0B) and multi I/O supported */ }, { Modified: trunk/flashchips.h ============================================================================== --- trunk/flashchips.h Sat Jun 1 02:30:31 2013 (r1676) +++ trunk/flashchips.h Sun Jun 9 16:00:46 2013 (r1677) @@ -655,12 +655,20 @@ #define WINBOND_NEX_W25X16 0x3015 #define WINBOND_NEX_W25X32 0x3016 #define WINBOND_NEX_W25X64 0x3017 -#define WINBOND_NEX_W25Q40 0x4013 -#define WINBOND_NEX_W25Q80 0x4014 -#define WINBOND_NEX_W25Q16 0x4015 -#define WINBOND_NEX_W25Q32 0x4016 -#define WINBOND_NEX_W25Q64 0x4017 -#define WINBOND_NEX_W25Q128 0x4018 +#define WINBOND_NEX_W25Q40_V 0x4013 /* W25Q40BV; W25Q40BL (2.3-3.6V) */ +#define WINBOND_NEX_W25Q80_V 0x4014 /* W25Q80BV */ +#define WINBOND_NEX_W25Q16_V 0x4015 /* W25Q16CV; W25Q16DV */ +#define WINBOND_NEX_W25Q32_V 0x4016 /* W25Q32BV; W25Q32FV in SPI mode (default) */ +#define WINBOND_NEX_W25Q64_V 0x4017 /* W25Q64BV, W25Q64CV; W25Q64FV in SPI mode (default) */ +#define WINBOND_NEX_W25Q128_V 0x4018 /* W25Q128BV; W25Q128FV in SPI mode (default) */ +#define WINBOND_NEX_W25Q256_V 0x4019 /* W25Q256FV */ +#define WINBOND_NEX_W25Q20_W 0x5012 /* W25Q20BW */ +#define WINBOND_NEX_W25Q40_W 0x5013 /* W25Q40BW */ +#define WINBOND_NEX_W25Q80_W 0x5014 /* W25Q80BW */ +#define WINBOND_NEX_W25Q16_W 0x6015 /* W25Q16DW */ +#define WINBOND_NEX_W25Q32_W 0x6016 /* W25Q32DW; W25Q32FV in QPI mode */ +#define WINBOND_NEX_W25Q64_W 0x6017 /* W25Q64DW; W25Q64FV in QPI mode */ +#define WINBOND_NEX_W25Q128_W 0x6018 /* (No W version known) W25Q128FV in QPI mode */ #define WINBOND_ID 0xDA /* Winbond */ #define WINBOND_W19B160BB 0x49

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Correupted Bios
by Mike Kallan 08 Jun '13

08 Jun '13

Dear Sir/Madam Let me brief you what happened... I bought a refurbished HP Desktop 4 months ago, and I set up the system FIRST time yesterday. Everything worked find till I updated the bios to the latest. At the end of the flashing, I got a message saying couldn't update the bios and I was forced to reboot the computer. Since that time, my computer doesn't work at all... I flush the bios from the mother board changing the pin and my computer started working except my keyboard and mouse doesn't work at all. So I have to shut down the computer manually by pressing power button on the desktop... If I restart the computer, I won't get anything on the monitor... I would be very grateful you will be able to help me in this situation. My computer details are as follows Model#: HP Pavilion P7-1141 (P7-1000) Prod#: QX351AAR#ABA Motherboard Name: AAHD3-HB Socket Type: FM1 Chipset: AMD Hudson-D3 FCH Form Factor: uATX: 24.3 cm (9.6 inches) x 24.3 cm (9.6 inches) Processor AMD Quad-Core A8-3800 Socket Type: FM1 Memory 8gb (Max. 16-GB) 4-Slots Hard Drive 1-TB 7200rpm Video AMD Radeon HD 6550D (Shared) Audio AMD Hudson-D3 Mother Board Spec & Clearing CMOS http://h10025.www1.hp.com/ewfrf/wc/document?cc=us&lc=en&dlc=en&docname=c029… http://h20000.www2.hp.com/bizsupport/TechSupport/Document.jsp?lang=en&cc=us… Thanks in advance Mike

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Re: [flashrom] FAILED: <Elitegroup GF8200A>
by Stefan Tauner 08 Jun '13

08 Jun '13

On Fri, 7 Jun 2013 21:09:21 -0400 Knowledge <dark.knowledge.lnx(a)gmail.com> wrote: > thanks in advance, but came up with a misfortune, there was a power > outage in my area and did not have UPS, to start again the pc and did > not respond, I am on a black screen T_T..... > > there will be some way to load the bios by other means? appreciate any > information of hope :'( that's very unfortunate :/ before you try anything else, try to reset the cmos memory (with a jumper usually). maybe the update was successful "enough" and the black screen is just caused by non-default settings. if that does not help there are essentially two options: 1. using the recovery code if it is still intact 2. using an external programmer to rewrite the flash chip usually there is a small part of the bios with a very limited initialization of the mainboard that is able to read bios files from floppy disks and write them to the flash chip (known as bootblock). but there is no floppy connector on that board AFAICS... no idea how this stuff works nowadays. some boards have special means to update via USB sticks, but no idea how good that works in general. also, we don't know if that part of the flash is ok. the error happened in the part where the bootblock usually is... the other option is to use an external programmer which can be another mainboard which also has a dip8 socket for its flash chip. (see http://flashrom.org/Technology#DIP8:_Dual_In-line_Package.2C_8_pins) it is possible to boot with the original chip and then swap it with the wrongly written one and write it again. this does not work with all boards but many. another option is to use a separate device to access the flash chip. for example you could use an arduino or a buspirate or any other embedded hardware that can connect to a PC with some effort. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] FAILED: <Elitegroup GF8200A>
by Knowledge 07 Jun '13

07 Jun '13

PD: I use my old pc pentium III for contact 2013/6/7, Knowledge <dark.knowledge.lnx(a)gmail.com>: > thanks in advance, but came up with a misfortune, there was a power > outage in my area and did not have UPS, to start again the pc and did > not respond, I am on a black screen T_T..... > > there will be some way to load the bios by other means? appreciate any > information of hope :'( > > sorry for my bad English, greetings from chile. > > > > 2013/6/7, Stefan Tauner <stefan.tauner(a)student.tuwien.ac.at>: >> Hi, >> >> can you please retry to write your update with >> sudo flashrom -p internal -w 78NAA512.ROM -VVV -o retry.log >> and if that still fails please try to write the backup with >> sudo flashrom -p internal -w backup.rom -VVV -o backup_write.log >> and send us the files, thanks. >> >> -- >> Kind regards/Mit freundlichen Grüßen, Stefan Tauner >> > > > -- > -- > <a href="dark.knowledge.lnx(a)gmail.com"><img > src="http://img262.imageshack.us/img262/1382/mailex5.png" > border="0"</></a> > > <a href="http://ubuntucounter.geekosophical.net" title="The Ubuntu > Counter Project - user number # 15441"><img > src="http://ubuntucounter.geekosophical.net/img/ubuntu-user2.php?user=15441" > alt="The Ubuntu Counter Project - user number # 15441" /></a> > -- -- <a href="dark.knowledge.lnx(a)gmail.com"><img src="http://img262.imageshack.us/img262/1382/mailex5.png" border="0"</></a> <a href="http://ubuntucounter.geekosophical.net" title="The Ubuntu Counter Project - user number # 15441"><img src="http://ubuntucounter.geekosophical.net/img/ubuntu-user2.php?user=15441" alt="The Ubuntu Counter Project - user number # 15441" /></a>

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Re: [flashrom] FAILED: <Elitegroup GF8200A>
by Stefan Tauner 07 Jun '13

07 Jun '13

Hi, can you please retry to write your update with sudo flashrom -p internal -w 78NAA512.ROM -VVV -o retry.log and if that still fails please try to write the backup with sudo flashrom -p internal -w backup.rom -VVV -o backup_write.log and send us the files, thanks. -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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FAILED: <Elitegroup GF8200A>
by Knowledge 06 Jun '13

06 Jun '13

detected NVIDIA MCP78S DMI string system-manufacturer: "ECS" DMI string system-product-name: "GeForce 8000 series" DMI string system-version: "1.0 " DMI string baseboard-manufacturer: "ECS" DMI string baseboard-product-name: "GeForce 8000 series" DMI string baseboard-version: "1.0 " DMI string chassis-type: "Desktop" Found chipset "NVIDIA MCP78S" with PCI ID 10de:075c. wasabi@wasabi-G:~/Descargas/bios$ sudo flashrom -p internal -r backup.rom flashrom v0.9.6.1-r1563 on Linux 3.9.3-pf (i686) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found chipset "NVIDIA MCP78S". This chipset is marked as untested. If you are using an up-to-date version of flashrom *and* were (not) able to successfully update your firmware with it, then please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... This chipset is not really supported yet. Guesswork... SPI on this chipset is WIP. Please report any success or failure by mailing us the verbose output to flashrom(a)flashrom.org, thanks! Mapping NVIDIA MCP6x SPI at 0xfbf80000, unaligned size 0x544. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. Found Winbond flash chip "W25X80" (1024 kB, SPI) at physical address 0xfff00000. Reading flash... done. wasabi@wasabi-G:~/Descargas/bios$ sudo flashrom -p internal -w 78NAA512.ROM flashrom v0.9.6.1-r1563 on Linux 3.9.3-pf (i686) flashrom is free software, get the source code at http://www.flashrom.org Calibrating delay loop... OK. Found chipset "NVIDIA MCP78S". This chipset is marked as untested. If you are using an up-to-date version of flashrom *and* were (not) able to successfully update your firmware with it, then please email a report to flashrom(a)flashrom.org including a verbose (-V) log. Thank you! Enabling flash write... This chipset is not really supported yet. Guesswork... SPI on this chipset is WIP. Please report any success or failure by mailing us the verbose output to flashrom(a)flashrom.org, thanks! Mapping NVIDIA MCP6x SPI at 0xfbf80000, unaligned size 0x544. Please send the output of "flashrom -V" to flashrom(a)flashrom.org with your board name: flashrom -V as the subject to help us finish support for your chipset. Thanks. OK. Found Winbond flash chip "W25X80" (1024 kB, SPI) at physical address 0xfff00000. Flash image seems to be a legacy BIOS. Disabling coreboot-related checks. Reading old flash chip contents... done. Erasing and writing flash chip... Erase/write done. Verifying flash... VERIFY FAILED at 0x000ff300! Expected=0x00, Read=0xff, failed byte count from 0x00000000-0x000fffff: 0xff Your flash chip is in an unknown state. Get help on IRC at chat.freenode.net (channel #flashrom) or mail flashrom(a)flashrom.org with the subject "FAILED: <your board name>"! ------------------------------------------------------------------------------- DO NOT REBOOT OR POWEROFF! product page http://www.ecs.com.tw/ECSWebSite/Product/Product_Detail.aspx?DetailID=873&C… bios downloaded http://download.ecsusa.com/dlfileecs/bios/mb/p4/GF8200A/78NAA512.zip -- -- <a href="dark.knowledge.lnx(a)gmail.com"><img src="http://img262.imageshack.us/img262/1382/mailex5.png" border="0"</></a> <a href="http://ubuntucounter.geekosophical.net" title="The Ubuntu Counter Project - user number # 15441"><img src="http://ubuntucounter.geekosophical.net/img/ubuntu-user2.php?user=15441" alt="The Ubuntu Counter Project - user number # 15441" /></a>

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Re: [flashrom] Added chipsets
by Stefan Tauner 04 Jun '13

04 Jun '13

On Mon, 3 Jun 2013 22:38:01 -0400 Steven Zakulec <spzakulec(a)gmail.com> wrote: > So, I think Stefan is going to handle the review of the S25FL128S / 256S > Spansion chips since they're a bit unusual. I'll handle those and maybe some other nitpicks when you two are done, yes. > The E and the uniform sector comment. This is because there are certain > chips that once had (or still do) have hybrid sector setups- the top block > of the chip could have one value, and the bottom block another. There are 3 possible erase sector layouts in this chip family. 'E' has uniform sectors (meaning that every erase address range done by any one opcode is equal in size) and then there are two other variants that split the top or bottom block into a number of subdivisions. As explained on IRC these were invented and useful earlier in computer history for bootblocks. But since flash chips got bigger and usually include quite fine-grained erase opcodes today, I don't think many of those variants of this family are in the wild, but that might be overly naive and optimistic. :) > Flashrom can only handle uniform sectors right now. That is incorrect. Flashrom *does* support them (e.g. Am29F002(N)BT). The problem is that with the current probing methods supported flashrom can not distinguish between those variants of the Micron chips. See Numonxy datasheet of the N25Q128 with "subsectors" (Rev 7, May 2011), section 9.1.1 Read Identification (RDID) explains how to identify the (non-)uniform layouts (respectively) with the bits in the first EDID byte (the second one seems to be not specified btw). The problem is: currently flashrom does only read the first 3 bytes (which is everything there was before they (Atmel has the patent afaik (yes this seems to be really patentable in countries with ridiculous patent rules)) to extend RDID like that). This will be solved by my in my GSoC project this summer. Until then I think it is ok to add them and expect them to be uniform. If there are really non-uniform variants out there the will be erase errors, but using another erase operation (which is done automatically) will work fine. But it is certainly a good idea to document that, hence the comments in flashchips.h. > +#define ST_N25Q256A13 0xBA19 /* N25Q256, 3.0V */ > should be: > +#define ST_N25Q256__3 0xBA19 /* N25Q256, 3.0V */ > > +#define ST_N25Q256A11 0xBB19 /* N25Q256, 1.8V */ > should be: > +#define ST_N25Q256__1 0xBB19 /* N25Q256, 1.8V */ > > +#define ST_N25Q512A13 0xBA20 /* N25Q512, 3.0V */ > should be: > +#define ST_N25Q512__3 0xBA20 /* N25Q512, 3.0V */ > > +#define ST_N25Q512A11 0xBB20 /* N25Q512, 1.8V */ > should be: > +#define ST_N25Q512__1 0xBB20 /* N25Q512, 1.8V */ > > +#define ST_N25Q00AA13 0xBA21 /* N25Q00A, 3.0V */ > should be: > +#define ST_N25Q00A__3 0xBA21 /* N25Q00A, 3.0V */ and please mention non-uniformness if you spot it in one of those datasheets (I have not checked that, but I guess Steven did so already). I will handle any further iterations of this patch set (so please be sure to mail it to the mailing list, Nikolay). -- Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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Re: [flashrom] Added chipsets
by Steven Zakulec 03 Jun '13

03 Jun '13

So, I think Stefan is going to handle the review of the S25FL128S / 256S Spansion chips since they're a bit unusual. I'm going to cover the flashchips.h part of the patch, and some issues with chip names/IDs that came up in review of the flashchips.h part. In general, chip names should contain only important characters- unimportant characters should be marked with a . or an _ depending on the field in flashchips.c and with an _ for names in flashchips.h. See http://www.flashrom.org/pipermail/flashrom/2012-July/009599.html for the reasoning here, and N25Q064..1E for an example. The Spansion chips you've added seem to have an extra letter at the end that's not important, so I would remove it. >From flashchips.h: #define ST_N25Q032__1E 0xBB16 /* N25Q032, 1.8V, (uniform sectors expected) */ #define ST_N25Q064__3E 0xBA17 /* N25Q064, 3.0V, (uniform sectors expected) */ #define ST_N25Q064__1E 0xBB17 /* N25Q064, 1.8V, (uniform sectors expected) */ Here's examples of chips with names that have been shortened due to unimportant characters. The underscore ( _ ) is used to replace the unimportant characters. There's also another item there that's important: #define ST_N25Q064__1E 0xBB17 /* N25Q064, 1.8V, (uniform sectors expected) */ The E and the uniform sector comment. This is because there are certain chips that once had (or still do) have hybrid sector setups- the top block of the chip could have one value, and the bottom block another. Flashrom can only handle uniform sectors right now. The N25Q128A13 is a great example of this: the Numonyx datasheet from Feb 2011 mentions it has uniform sectors, but the May 2011 sheet says it has top or bottom sectors +#define ST_N25Q128A13 0xBA18 /* N25Q128, 3.0V */ should be: +#define ST_N25Q128__3E 0xBA18 /* N25Q128, 3.0V, (uniform sectors expected) */ +#define ST_N25Q128A11 0xBB18 /* N25Q128, 1.8V */ should be: +#define ST_N25Q128__1E 0xBB18 /* N25Q128, 1.8V, (uniform sectors expected) */ +#define ST_N25Q256A13 0xBA19 /* N25Q256, 3.0V */ should be: +#define ST_N25Q256__3 0xBA19 /* N25Q256, 3.0V */ +#define ST_N25Q256A11 0xBB19 /* N25Q256, 1.8V */ should be: +#define ST_N25Q256__1 0xBB19 /* N25Q256, 1.8V */ +#define ST_N25Q512A13 0xBA20 /* N25Q512, 3.0V */ should be: +#define ST_N25Q512__3 0xBA20 /* N25Q512, 3.0V */ +#define ST_N25Q512A11 0xBB20 /* N25Q512, 1.8V */ should be: +#define ST_N25Q512__1 0xBB20 /* N25Q512, 1.8V */ +#define ST_N25Q00AA13 0xBA21 /* N25Q00A, 3.0V */ should be: +#define ST_N25Q00A__3 0xBA21 /* N25Q00A, 3.0V */ Please adjust the .name and .model_id fields in flashchips.c so the names are properly shortened as done above: .name uses periods in place of characters .model_id uses underscores ( _ ) in place of characters Please see N25Q064..3E for an example of this in flashchips.c I realize this may be a lot to take in, so ask questions, and if I can't answer it, hopefully someone else on the list can.

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mac address problem with nvidia MCP55V-Pro
by Jon Morby 01 Jun '13

01 Jun '13

hi … I don't suppose anyone has any experience updating or fixing MAC addresses on Nvidea nVIDIA MCP55V-Pro (Supermicro H8DMT+) ? Following an experimental reflash everything went well, except afterwards we noticed the mac address had been reset link/ether 66:77:44:22:33:12 brd ff:ff:ff:ff:ff:ff -- Jon Morby FidoNet - the internet made simple! 10 - 16 Tiller Road, London, E14 8PX tel: 0845 004 3050 / fax: 0845 004 3051

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